From patchwork Fri Apr 28 22:36:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhinav Kumar X-Patchwork-Id: 678052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A17E1C77B7C for ; Fri, 28 Apr 2023 22:37:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346101AbjD1Wha (ORCPT ); Fri, 28 Apr 2023 18:37:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230227AbjD1Wh3 (ORCPT ); Fri, 28 Apr 2023 18:37:29 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3D561706; Fri, 28 Apr 2023 15:37:27 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33SKS53A031521; Fri, 28 Apr 2023 22:37:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=YcSRDXQ+gVIp36WVYLV9EBeJI7uPGCIHt9sD1alsijU=; b=XprLg+3c8fp6CcbSJUBSJqmCLqG7Wr26w14Gi9AbgWxwmDFofFch/V8CdIwMtQJPtkoR fs2Gxp7iYHE7g2uvoNenCktflL+AN+6ATWo3er4LPpKZFpp8Y2VsV6nuUa1ap/rlobm2 DVKSCRKwzAfUN7d4ZTqN4Qii2lRg99cr2y0V8fP2VF4oFTMng82xOuKfRRI7GL+1FVDT PnfgfMgLE7gUDXVQpLWO3mLznj78DQ71mZK6BzGaqV+LcxJTUSva6O6Y3rITn+Srd9kB Yeal7XyIeh2Kc+7Os2+d1cnShagwZxH5cIJ9c0ufUj5flUhnQbQXK/fBhSbecK2duoMy Dg== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q8fvnh44y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 28 Apr 2023 22:37:23 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33SMbL87000348 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 28 Apr 2023 22:37:21 GMT Received: from abhinavk-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 28 Apr 2023 15:37:21 -0700 From: Abhinav Kumar To: , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter CC: , , , , Subject: [PATCH v3 2/4] drm/msm/dpu: remove DPU_DSPP_IGC handling in dspp flush Date: Fri, 28 Apr 2023 15:36:44 -0700 Message-ID: <20230428223646.23595-2-quic_abhinavk@quicinc.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230428223646.23595-1-quic_abhinavk@quicinc.com> References: <20230428223646.23595-1-quic_abhinavk@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: xK7pLUHJ-ARqq5_At0puxIwRI8dMKlFe X-Proofpoint-GUID: xK7pLUHJ-ARqq5_At0puxIwRI8dMKlFe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-28_08,2023-04-27_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=960 spamscore=0 bulkscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304280188 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Inverse gamma correction blocks (IGC) are not used today so lets remove the usage of DPU_DSPP_IGC in the DSPP flush to make it easier to remove IGC from the catalog. We can add this back when IGC is properly supported in DPU with one of the standard DRM properties. changes in v3: - minor change dspp -> DSPP in commit text Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 57adaebab563..b2a1f83ac72c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -330,9 +330,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( return; switch (dspp_sub_blk) { - case DPU_DSPP_IGC: - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(2); - break; case DPU_DSPP_PCC: ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); break;