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[178.235.179.206]) by smtp.gmail.com with ESMTPSA id k16-20020a056402049000b00552d03a17acsm4824397edv.61.2023.12.19.16.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 16:31:04 -0800 (PST) From: Konrad Dybcio Date: Wed, 20 Dec 2023 01:30:48 +0100 Subject: [PATCH v3 07/15] clk: qcom: gpucc-sm6115: Add runtime PM Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230717-topic-branch_aon_cleanup-v3-7-3e31bce9c626@linaro.org> References: <20230717-topic-branch_aon_cleanup-v3-0-3e31bce9c626@linaro.org> In-Reply-To: <20230717-topic-branch_aon_cleanup-v3-0-3e31bce9c626@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1703032250; l=2049; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=wo6RqwrpI+TvZGgUHlprTgAEXXwaEB8xXAWdfaiQ80I=; b=+GHnWyX1q0y09xk4YvnrfK9G829CiNmLGzLSLcS2W4lC4JlsUUv+0/aV3oEQO8a49yvcAdhIx 1DuoxWx1HnlCN1McDBF7ux42+CX7BY6Z/8SBUyeThWJN7Ox8/mmO5RN X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= The GPU_CC block on SM6115 is powered by the VDD_CX rail. We need to ensure that CX is enabled to prevent unwanted power collapse and that the reference is dropped when unused so that the system can enter a firmware-managed lower power state. Enable runtime PM to keep the power flowing only when necessary. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gpucc-sm6115.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gpucc-sm6115.c b/drivers/clk/qcom/gpucc-sm6115.c index 93a50431aef8..b50979ce1cbe 100644 --- a/drivers/clk/qcom/gpucc-sm6115.c +++ b/drivers/clk/qcom/gpucc-sm6115.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -443,10 +444,21 @@ MODULE_DEVICE_TABLE(of, gpu_cc_sm6115_match_table); static int gpu_cc_sm6115_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; + + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; + + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret) + return ret; regmap = qcom_cc_map(pdev, &gpu_cc_sm6115_desc); - if (IS_ERR(regmap)) + if (IS_ERR(regmap)) { + pm_runtime_put(&pdev->dev); return PTR_ERR(regmap); + } clk_alpha_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); clk_alpha_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); @@ -461,7 +473,10 @@ static int gpu_cc_sm6115_probe(struct platform_device *pdev) qcom_branch_set_clk_en(regmap, 0x1078); /* GPU_CC_AHB_CLK */ qcom_branch_set_clk_en(regmap, 0x1060); /* GPU_CC_GX_CXO_CLK */ - return qcom_cc_really_probe(pdev, &gpu_cc_sm6115_desc, regmap); + ret = qcom_cc_really_probe(pdev, &gpu_cc_sm6115_desc, regmap); + pm_runtime_put(&pdev->dev); + + return ret; } static struct platform_driver gpu_cc_sm6115_driver = {