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[83.9.2.185]) by smtp.gmail.com with ESMTPSA id j20-20020ac253b4000000b004fbdba4b075sm1861679lfh.57.2023.08.08.04.43.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Aug 2023 04:43:36 -0700 (PDT) From: Konrad Dybcio Date: Tue, 08 Aug 2023 13:43:32 +0200 Subject: [PATCH v3 01/10] interconnect: qcom: icc-rpm: Add AB/IB calculations coefficients MIME-Version: 1.0 Message-Id: <20230726-topic-icc_coeff-v3-1-dee684d6cdd2@linaro.org> References: <20230726-topic-icc_coeff-v3-0-dee684d6cdd2@linaro.org> In-Reply-To: <20230726-topic-icc_coeff-v3-0-dee684d6cdd2@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Michael Turquette , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1691495013; l=3362; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PtHTjiWgQBO5SjMZ6oomj/9k2KcOHpsmAcBX0YEWtv0=; b=mKs8Vh24BaouL9/kklS4fc/ZntNALxrPg1h5q7n5dx/NyCkJoJi2Uy1djpoUO53f1Y5PJW0Zt Y5TKpai734mDuUv/Hi1sEC8msgfry+G4zOspXXksOcjoM/muknRRlv4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Presumably due to the hardware being so complex, some nodes (or busses) have different (usually higher) requirements for bandwidth than what the usual calculations would suggest. Looking at the available downstream files, it seems like AB values are adjusted per-bus and IB values are adjusted per-node. With that in mind, introduce percentage-based coefficient struct members and use them in the calculations. One thing to note is that the IB coefficient is inverse (100/ib_percent) which feels a bit backwards, but it's necessary for precision.. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 18 +++++++++++++++--- drivers/interconnect/qcom/icc-rpm.h | 6 ++++++ 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 2c16917ba1fd..8b02aa8aa96a 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -298,7 +298,8 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, */ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate) { - u64 agg_avg_rate, agg_rate; + struct qcom_icc_provider *qp = to_qcom_provider(provider); + u64 agg_avg_rate, agg_peak_rate, agg_rate; struct qcom_icc_node *qn; struct icc_node *node; int i; @@ -315,8 +316,19 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_r else agg_avg_rate = qn->sum_avg[i]; - agg_rate = max_t(u64, agg_avg_rate, qn->max_peak[i]); - do_div(agg_rate, qn->buswidth); + if (qp->ab_coeff) { + agg_avg_rate = agg_avg_rate * qp->ab_coeff; + agg_avg_rate = div_u64(agg_avg_rate, 100); + } + + if (qp->ib_coeff) { + agg_peak_rate = qn->max_peak[i] * 100; + agg_peak_rate = div_u64(qn->max_peak[i], qp->ib_coeff); + } else { + agg_peak_rate = qn->max_peak[i]; + } + + agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate); agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate); } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index eed3451af3e6..5e7d6a4fd2f3 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -44,6 +44,8 @@ struct rpm_clk_resource { * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers + * @ab_coeff: a percentage-based coefficient for compensating the AB calculations + * @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations * @bus_clk_rate: bus clock rate in Hz * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks * @bus_clk: a pointer to a HLOS-owned bus clock @@ -57,6 +59,8 @@ struct qcom_icc_provider { enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; + u16 ab_coeff; + u16 ib_coeff; u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; const struct rpm_clk_resource *bus_clk_desc; struct clk *bus_clk; @@ -123,6 +127,8 @@ struct qcom_icc_desc { enum qcom_icc_type type; const struct regmap_config *regmap_cfg; unsigned int qos_offset; + u16 ab_coeff; + u16 ib_coeff; }; /* Valid for all bus types */