Message ID | 20231013164025.3541606-1-robimarko@gmail.com |
---|---|
State | Accepted |
Commit | afc4f14be33c50f066392f1e9671473419ba7ded |
Headers | show |
Series | [v3,1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks | expand |
On Fri, 13 Oct 2023 at 19:41, Robert Marko <robimarko@gmail.com> wrote: > > Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to > find them by matching globaly by name. > > If not passed directly, driver maintains backwards compatibility by then > falling back to global lookup. > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > Changes in v2: > * Make clocks and clock-names one-per-line > > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On Fri, 13 Oct 2023 18:39:33 +0200, Robert Marko wrote: > QMP PCI PHY PIPE clocks are inputs for the GCC clock controller. > In order to describe this in DTS, allow passing them as the inputs to GCC. > > This has a benefit that it avoids doing a global matching by name. > > Applied, thanks! [1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks commit: afc4f14be33c50f066392f1e9671473419ba7ded [2/2] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to GCC commit: 591da388c344f934601548cb44f54eab012c6c94 Best regards,
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 52e7831a8d6d..2d44ddc45aab 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -27,11 +27,15 @@ properties: items: - description: board XO clock - description: sleep clock + - description: Gen3 QMP PCIe PHY PIPE clock + - description: Gen2 QMP PCIe PHY PIPE clock clock-names: items: - const: xo - const: sleep_clk + - const: pcie0_pipe + - const: pcie1_pipe required: - compatible