| Message ID | 20231125-topic-rb1_feat-v2-6-979b28f35e4a@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | RB1/QCM2290 features | expand |
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 11f353d416b4..9664e42faeb1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3100,8 +3100,12 @@ mdss: display-subsystem@ae00000 { interrupt-controller; #interrupt-cells = <1>; - interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem"; + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "mdp0-mem", + "cpu-cfg"; iommus = <&apps_smmu 0x800 0x2>;
MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. Failing to provide it may result in register accesses failing and that's never good. Add the missing path. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)