From patchwork Thu Jan 25 18:59:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Kurapati X-Patchwork-Id: 766500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6278137C3D; Thu, 25 Jan 2024 18:59:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706209201; cv=none; b=aSHSJieFRUgT1RyfqpoKXpe7kfr5Pv84sEQT8Rs3iRiMmH7MxiFhZRvPED0QeY8cGyshd7M5SHvUYetItJhq7Awkv74K3kYx7p2mm5fio7Aa85qdJv+Zawfl0tvub04iseJuokL55QEBKeiFIl6QOiJOzff34X02umgA6qdoSMI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706209201; c=relaxed/simple; bh=HDJDZ7O9mdNe/Y3AxDRfD6+ErhPOkpfNXxy4R/TlEVM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OM+fbyx0YaC7wEkeavMeRaM6MLFL5ucMsOkUmLOVqWYBsuMQdfpcaL8+FBcUgEvX92e8a9oUsLNhbu2qbtOrjnrNbA5I8NFaZX6ultr+iu9ZijRKwejXFN1yrb4rxilnbNR8ZXixh8hjl13E4sqJkrJvC5uZOntZP8XdgXDramg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=kL9B3p5z; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="kL9B3p5z" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40PIB9qL007932; Thu, 25 Jan 2024 18:59:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=JAN4K8Xa62IAsqf/M72hM6xabS3g3wSCJxBQxVgkqKM=; b=kL 9B3p5z+HiJSSWJFL1Bmm3qDUPMvx7CCrfyoPrQqOyfAfY93afoP7mLAkkItKSZuY cQop515lfjGx9LKwByW1XxHgTfRjJpNc/DSm8xkUcRaT06t+How46xv/XMqKvaAs 4e1LkkDa0cpQ1RDi5r7x8cbJ1sgNpI31Lcylqc3LGGVH1uINxYkveKtb4X5mqzTK NtIROhshOjEyG5To8NuP/MS5TVnRU1jdVGmaH8tULFhuJBWZHAR5fimup2Z/X8DS iT93SqQyynjIdAdP9qNwmAmk/qIJgNzOiuH0JrEEIpHiiPVHNMxbNX9txD1751YL befFIifFNjrySozzBzvQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vupy897ky-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 Jan 2024 18:59:55 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40PIxsaf017202 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 Jan 2024 18:59:54 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 25 Jan 2024 10:59:50 -0800 From: Krishna Kurapati To: Krzysztof Kozlowski , Rob Herring , Bjorn Andersson , Konrad Dybcio , Conor Dooley , CC: , , , , , Krishna Kurapati Subject: [PATCH v3 4/4] arm64: dts: qcom: Add missing interrupts for qcs404/ipq5332 Date: Fri, 26 Jan 2024 00:29:21 +0530 Message-ID: <20240125185921.5062-5-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240125185921.5062-1-quic_kriskura@quicinc.com> References: <20240125185921.5062-1-quic_kriskura@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Xc1Pb3bBJfh54XCTb1wgQNi8qdmt51Mf X-Proofpoint-ORIG-GUID: Xc1Pb3bBJfh54XCTb1wgQNi8qdmt51Mf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-25_12,2024-01-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 mlxscore=0 adultscore=0 phishscore=0 bulkscore=0 malwarescore=0 mlxlogscore=276 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401250137 For qcs404 and ipq5332, certain interrupts are missing in DT. Add them to ensure they are in accordance to bindings. The interrupts added enable remote wakeup functionality for these SoCs. Signed-off-by: Krishna Kurapati --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 8 ++++++-- arch/arm64/boot/dts/qcom/qcs404.dtsi | 16 ++++++++++++++++ 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 42e2e48b2bc3..770d9c2fb456 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -320,8 +320,12 @@ usb: usb@8af8800 { compatible = "qcom,ipq5332-dwc3", "qcom,dwc3"; reg = <0x08af8800 0x400>; - interrupts = ; - interrupt-names = "hs_phy_irq"; + interrupts = , + , + ; + interrupt-names = "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; clocks = <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_SNOC_USB_CLK>, diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 2f2eeaf2e945..a05d0234f7fc 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -675,6 +675,14 @@ usb3: usb@7678800 { assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; + + interrupts = , + , + ; + interrupt-names = "pwr_event", + "hs_phy_irq", + "qusb2_phy"; + status = "disabled"; usb3_dwc3: usb@7580000 { @@ -704,6 +712,14 @@ usb2: usb@79b8800 { assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>; assigned-clock-rates = <19200000>, <133333333>; + + interrupts = , + , + ; + interrupt-names = "pwr_event", + "hs_phy_irq", + "qusb2_phy"; + status = "disabled"; usb@78c0000 {