Message ID | 20240208231406.27397-8-quic_wcheng@quicinc.com |
---|---|
State | Superseded |
Headers | show
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Thu, 08 Feb 2024 23:14:19 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 418NEIGl012196 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 8 Feb 2024 23:14:18 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 8 Feb 2024 15:14:17 -0800 From: Wesley Cheng <quic_wcheng@quicinc.com> To: <srinivas.kandagatla@linaro.org>, <mathias.nyman@intel.com>, <perex@perex.cz>, <conor+dt@kernel.org>, <corbet@lwn.net>, <lgirdwood@gmail.com>, <andersson@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <gregkh@linuxfoundation.org>, <Thinh.Nguyen@synopsys.com>, <broonie@kernel.org>, <bgoswami@quicinc.com>, <tiwai@suse.com>, <robh+dt@kernel.org>, <konrad.dybcio@linaro.org> CC: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-sound@vger.kernel.org>, <linux-usb@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <linux-doc@vger.kernel.org>, <alsa-devel@alsa-project.org>, Mathias Nyman <mathias.nyman@linux.intel.com>, Wesley Cheng <quic_wcheng@quicinc.com> Subject: [PATCH v14 07/53] xhci: update event ring dequeue pointer position to controller correctly Date: Thu, 8 Feb 2024 15:13:20 -0800 Message-ID: <20240208231406.27397-8-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240208231406.27397-1-quic_wcheng@quicinc.com> References: <20240208231406.27397-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: sP22P7Fda8SrKVI3FRS9q_RMAUOS53sY X-Proofpoint-GUID: sP22P7Fda8SrKVI3FRS9q_RMAUOS53sY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-08_11,2024-02-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402080131 |
Series |
Introduce QC USB SND audio offloading support
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expand
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diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index a9d2e876d62b..0289d77839cf 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -2966,9 +2966,6 @@ static int xhci_handle_event(struct xhci_hcd *xhci, struct xhci_interrupter *ir) return 0; } - /* Update SW event ring dequeue pointer */ - inc_deq(xhci, ir->event_ring); - /* Are there more items on the event ring? Caller will call us again to * check. */ @@ -3091,15 +3088,21 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd) * that clears the EHB. */ while (xhci_handle_event(xhci, ir) > 0) { - if (event_loop++ < TRBS_PER_SEGMENT / 2) - continue; - xhci_update_erst_dequeue(xhci, ir, false); + /* + * If half a segment of events have been handled in one go then + * update ERDP, and force isoc trbs to interrupt more often + */ + if (event_loop++ > TRBS_PER_SEGMENT / 2) { + xhci_update_erst_dequeue(xhci, ir, false); + + if (ir->isoc_bei_interval > AVOID_BEI_INTERVAL_MIN) + ir->isoc_bei_interval = ir->isoc_bei_interval / 2; - /* ring is half-full, force isoc trbs to interrupt more often */ - if (ir->isoc_bei_interval > AVOID_BEI_INTERVAL_MIN) - ir->isoc_bei_interval = ir->isoc_bei_interval / 2; + event_loop = 0; + } - event_loop = 0; + /* Update SW event ring dequeue pointer */ + inc_deq(xhci, ir->event_ring); } xhci_update_erst_dequeue(xhci, ir, true);