| Message ID | 20240429-usb-link-dtsi-v1-3-87c341b55cdf@linaro.org |
|---|---|
| State | Accepted |
| Commit | a84f3627f9d9765853b244f0cf50d3cafd1f0957 |
| Headers | show |
| Series | arm64: dts: qcom: move common USB-related properties to SoC dtsi | expand |
On 29/04/2024 14:43, Dmitry Baryshkov wrote: > Move the graph connection between USB host, USB SS PHY and DP port to > the SoC dtsi file. They are linked in hardware in this way. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 25 +++---------------------- > arch/arm64/boot/dts/qcom/sm8450.dtsi | 11 +++++++++++ > 2 files changed, 14 insertions(+), 22 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts > index 3be46b56c723..9926294e4f84 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts > +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts > @@ -674,17 +674,10 @@ &mdss_dsi0_phy { > > &mdss_dp0 { > status = "okay"; > +}; > > - ports { > - port@1 { > - reg = <1>; > - > - mdss_dp0_out: endpoint { > - data-lanes = <0 1>; > - remote-endpoint = <&usb_1_qmpphy_dp_in>; > - }; > - }; > - }; > +&mdss_dp0_out { > + data-lanes = <0 1>; > }; > > &pcie0 { > @@ -1114,10 +1107,6 @@ &usb_1_dwc3_hs { > remote-endpoint = <&pmic_glink_hs_in>; > }; > > -&usb_1_dwc3_ss { > - remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; > -}; > - > &usb_1_hsphy { > status = "okay"; > > @@ -1135,18 +1124,10 @@ &usb_1_qmpphy { > orientation-switch; > }; > > -&usb_1_qmpphy_dp_in { > - remote-endpoint = <&mdss_dp0_out>; > -}; > - > &usb_1_qmpphy_out { > remote-endpoint = <&pmic_glink_ss_in>; > }; > > -&usb_1_qmpphy_usb_ss_in { > - remote-endpoint = <&usb_1_dwc3_ss>; > -}; > - > &vamacro { > pinctrl-0 = <&dmic01_default>, <&dmic23_default>; > pinctrl-names = "default"; > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi > index 616461fcbab9..d138b90bb280 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi > @@ -2321,6 +2321,7 @@ port@1 { > reg = <1>; > > usb_1_qmpphy_usb_ss_in: endpoint { > + remote-endpoint = <&usb_1_dwc3_ss>; > }; > }; > > @@ -2328,6 +2329,7 @@ port@2 { > reg = <2>; > > usb_1_qmpphy_dp_in: endpoint { > + remote-endpoint = <&mdss_dp0_out>; > }; > }; > }; > @@ -3119,6 +3121,14 @@ mdss_dp0_in: endpoint { > remote-endpoint = <&dpu_intf0_out>; > }; > }; > + > + port@1 { > + reg = <1>; > + > + mdss_dp0_out: endpoint { > + remote-endpoint = <&usb_1_qmpphy_dp_in>; > + }; > + }; > }; > > dp_opp_table: opp-table { > @@ -4584,6 +4594,7 @@ port@1 { > reg = <1>; > > usb_1_dwc3_ss: endpoint { > + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; > }; > }; > }; > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
On 29.04.2024 2:43 PM, Dmitry Baryshkov wrote: > Move the graph connection between USB host, USB SS PHY and DP port to > the SoC dtsi file. They are linked in hardware in this way. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index 3be46b56c723..9926294e4f84 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -674,17 +674,10 @@ &mdss_dsi0_phy { &mdss_dp0 { status = "okay"; +}; - ports { - port@1 { - reg = <1>; - - mdss_dp0_out: endpoint { - data-lanes = <0 1>; - remote-endpoint = <&usb_1_qmpphy_dp_in>; - }; - }; - }; +&mdss_dp0_out { + data-lanes = <0 1>; }; &pcie0 { @@ -1114,10 +1107,6 @@ &usb_1_dwc3_hs { remote-endpoint = <&pmic_glink_hs_in>; }; -&usb_1_dwc3_ss { - remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; -}; - &usb_1_hsphy { status = "okay"; @@ -1135,18 +1124,10 @@ &usb_1_qmpphy { orientation-switch; }; -&usb_1_qmpphy_dp_in { - remote-endpoint = <&mdss_dp0_out>; -}; - &usb_1_qmpphy_out { remote-endpoint = <&pmic_glink_ss_in>; }; -&usb_1_qmpphy_usb_ss_in { - remote-endpoint = <&usb_1_dwc3_ss>; -}; - &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic23_default>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 616461fcbab9..d138b90bb280 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2321,6 +2321,7 @@ port@1 { reg = <1>; usb_1_qmpphy_usb_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; }; }; @@ -2328,6 +2329,7 @@ port@2 { reg = <2>; usb_1_qmpphy_dp_in: endpoint { + remote-endpoint = <&mdss_dp0_out>; }; }; }; @@ -3119,6 +3121,14 @@ mdss_dp0_in: endpoint { remote-endpoint = <&dpu_intf0_out>; }; }; + + port@1 { + reg = <1>; + + mdss_dp0_out: endpoint { + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; + }; }; dp_opp_table: opp-table { @@ -4584,6 +4594,7 @@ port@1 { reg = <1>; usb_1_dwc3_ss: endpoint { + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; }; };
Move the graph connection between USB host, USB SS PHY and DP port to the SoC dtsi file. They are linked in hardware in this way. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 25 +++---------------------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 11 +++++++++++ 2 files changed, 14 insertions(+), 22 deletions(-)