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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv3 1/5] ARM: dts: qcom: ipq4019: use nvmem-layout Date: Wed, 9 Oct 2024 14:48:43 -0700 Message-ID: <20241009214847.67188-2-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241009214847.67188-1-rosenp@gmail.com> References: <20241009214847.67188-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi index 0d23c03fae33..a6d4390efa7c 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi @@ -166,16 +166,19 @@ partition@170000 { label = "ART"; reg = <0x00170000 0x00010000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; };