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Thu, 31 Oct 2024 14:44:17 -0700 (PDT) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53c7bc9c162sm339567e87.96.2024.10.31.14.44.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Oct 2024 14:44:15 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 31 Oct 2024 23:44:07 +0200 Subject: [PATCH 2/3] drm/msm: move MAX_H_TILES_PER_DISPLAY to the DPU driver Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241031-dpu-move-topology-v1-2-8ffa8122d3b6@linaro.org> References: <20241031-dpu-move-topology-v1-0-8ffa8122d3b6@linaro.org> In-Reply-To: <20241031-dpu-move-topology-v1-0-8ffa8122d3b6@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1180; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=EC7IGqyWyXuYvmoAr9YuRm5TGifA5Zv3WnYyU2rd82o=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnI/opi+wDcjEvxhC+rIat6pKUCcGKpfNdmmaAt 9vUSHuUDLqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZyP6KQAKCRCLPIo+Aiko 1YzdB/4jdKKPqLoJbWAouBP5G+3BfGdeVtLUvTtV+yvyS3gWhRxPsytqFnjEoXTckZ1A/yTNGNA Hb943ynC6jUrpCYTdDNvinO5brkmhw2yx0HO9e12L6677VH8SlBRGevTaKEDoK4IO+EYyZBWLiy hBxllul6PktuqP5crBnmLU/5SNphhqNxeeofJlbeDF8eCqPQuBwB3jxL4kB51UIAGeFbRAAdRzC UsyyhYE5wCkWa/BNqNAsbitddR45Dgx2UnhHmGdI5RCsaoaKAziQJmOogxPK36Uc8KD7BhfqBPz WYV7Uhf3Bqgh5r/DkrsbgULO9cXKAoJjA5gJsRoxIq7ObEH4 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MAX_H_TILES_PER_DISPLAY const is only used by the DPU driver, move it to the corresponding header. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 ++ drivers/gpu/drm/msm/msm_drv.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index f7465a1774aa..6c4f3d7dfbb1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -19,6 +19,8 @@ #define IDLE_TIMEOUT (66 - 16/2) +#define MAX_H_TILES_PER_DISPLAY 2 + /** * struct msm_display_info - defines display properties * @intf_type: INTF_ type diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index ae3adb0f68a8..1dc161d9bf51 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -71,7 +71,6 @@ enum msm_dsi_controller { }; #define MSM_GPU_MAX_RINGS 4 -#define MAX_H_TILES_PER_DISPLAY 2 /* Commit/Event thread specific structure */ struct msm_drm_thread {