| Message ID | 20241213-qcs615-gpu-dt-v2-2-47f3b312b178@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Devicetree changes for QCS615's GPU | expand |
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index b1bd372996d57138a0e80f8d93df09943775fdfa..6889dda7d4be71535dff1a62ca30f980bfc6128d 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -27,6 +27,7 @@ properties: - pattern: '^qcom,adreno-gmu-x[1-9][0-9][0-9]\.[0-9]$' - const: qcom,adreno-gmu - const: qcom,adreno-gmu-wrapper + - const: qcom,adreno-rgmu reg: minItems: 1 @@ -267,12 +268,14 @@ allOf: properties: compatible: contains: - const: qcom,adreno-gmu-wrapper + enum: + - qcom,adreno-gmu-wrapper + - qcom,adreno-rgmu then: properties: reg: items: - - description: GMU wrapper register space + - description: RGMU/GMU wrapper register space reg-names: items: - const: gmu
RGMU a.k.a Reduced Graphics Management Unit is a small state machine with the sole purpose of providing IFPC support. Compared to GMU, it doesn't manage GPU clock, voltage scaling, bw voting or any other functionalities. All it does is detect an idle GPU and toggle the GDSC switch. So it doesn't require iommu & opp table. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> --- Documentation/devicetree/bindings/display/msm/gmu.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)