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From: Prashanth K <quic_prashk@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio
<konradybcio@kernel.org>, Rob Herring <robh@kernel.org>,
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Prashanth K <quic_prashk@quicinc.com>
Subject: [PATCH v2 11/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDX75
Date: Fri, 13 Dec 2024 15:22:29 +0530
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| Series |
Disable USB U1/U2 entry for QC targets
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expand
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diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi index 5f7e59ecf1ca..8e444a9d00ed 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -1037,6 +1037,8 @@ usb_dwc3: usb@a600000 { iommus = <&apps_smmu 0x80 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; phys = <&usb_hsphy>, <&usb_qmpphy>; phy-names = "usb2-phy",
Disable U1 and U2 power-saving states to improve stability of USB. These low-power link states, designed to reduce power consumption during idle periods, can cause issues in latency-sensitive or high throughput use cases. Over the years, some of the issues seen are as follows: 1. In device mode of operation, when UVC is active, enabling U1/U2 is sometimes causing packets drops due to delay in entry/exit of intermittent these low power states. These packet drops are often reflected as missed isochronous transfers, as the controller wasn't able to send packet in that microframe interval and hence glitches are seen on the final transmitted video output. 2. On older targets like SM8150/SM8250/SM8350, there have been throughput issues seen during tethering use cases. 3. On targets like SDX75, intermittent disconnects were observed with certain cables due to impedence variations. Disabling these intermittent power states enhances device stability without affecting power usage. Signed-off-by: Prashanth K <quic_prashk@quicinc.com> --- arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 ++ 1 file changed, 2 insertions(+)