From patchwork Fri Dec 13 10:07:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tao Zhang X-Patchwork-Id: 850391 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 262611BFDFC; Fri, 13 Dec 2024 10:09:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734084545; cv=none; b=CSgO758cQgyYMouj4CXMG34BT0Z8fCOsPLf5BHuMsjdYASkQSfpzhSZBxMiezh45n8LdE6GbsveKEsvZ+1EVdpAm2OPZbPlK9RknVyNJB0N5kjsbzG+tUYAclFK+xt/XUtJD90LBPZzUeHkJsF0o5mTl10b57zBU19ABe+HYj7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734084545; c=relaxed/simple; bh=I96TNLP3WDl43yHyi9I3Uh0pTfezJqlLXTL57xJxQFY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XBYv5IYgSiZZr3eOM5NvgDlNNgW8fzlKYCA6tfmuyhqGS9dsgPrYbhEveU9utDSCebVtQzerfAoUjiDGRGQjtKNEXm1TDswSlaDXeBfCwJdq7OQqqzPHMMjqiV2bsbwBnROXbHat9yo0ambe7fLVLygM83vvuwN4whwazBLMwo0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=CLFrc/es; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="CLFrc/es" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4BD8I4Jj026835; Fri, 13 Dec 2024 10:08:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=qcppdkim1; bh=Cdt/qfXOkx8PKnT8UIkIL4In A88gLWshyiOYSRqUUis=; b=CLFrc/esVRgtnq77/aZur+3Xb4SzSL5I48oPKag0 GQFPrFhU2pFgYf+2m+LiD1BDnkt4zTDmNPB80TwipdNdUycfGn0vBuwlpc46BCSL yeY+KjODrJT4QKfEq7kW/CVcXP60N8095XQZPshBIkgLgP55l8YoQYaEl7rKGf/q PApaoPeLGPx/9VtI7y8mUFxRyXK+Sx5Y6tcsybDLHdTiem3+qlaUyuRiVMhQAkV7 WtCPyFuq4Ck//c8/SCKpwDC3GZdU2YqjZGcI+XRnrWXNwCY/H+29apPrLNBGScSQ XKeT4+/xEZLJ60HDhGfKrtFmIhoIK90fMcP3soE8wjPPSQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43fd40nx8q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Dec 2024 10:08:53 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BDA8rqO021276 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Dec 2024 10:08:53 GMT Received: from taozha2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 13 Dec 2024 02:08:49 -0800 From: Tao Zhang To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Leo Yan , Alexander Shishkin CC: Tao Zhang , , , , , Subject: [PATCH v7 4/4] coresight-tpda: Optimize the function of reading element size Date: Fri, 13 Dec 2024 18:07:31 +0800 Message-ID: <20241213100731.25914-5-quic_taozha@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241213100731.25914-1-quic_taozha@quicinc.com> References: <20241213100731.25914-1-quic_taozha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: FtIhNxdw7RdLKRwoiDBAw72O2QXFwUk- X-Proofpoint-ORIG-GUID: FtIhNxdw7RdLKRwoiDBAw72O2QXFwUk- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 suspectscore=0 impostorscore=0 phishscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412130069 Since the new funnel device supports multi-port output scenarios, there may be more than one TPDM connected to one TPDA. In this way, when reading the element size of the TPDM, TPDA driver needs to find the expected TPDM corresponding to the filter source. When TPDA finds a TPDM or a filter source from a input connection, it will read the Devicetree to get the expected TPDM's element size. Signed-off-by: Tao Zhang --- drivers/hwtracing/coresight/coresight-tpda.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c index ab94067c0ed3..189a4abc2561 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -110,6 +110,16 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata, csdev->pdata->in_conns[i]->dest_port != inport) continue; + /* + * If this port has a hardcoded filter, use the source + * device directly. + */ + if (csdev->pdata->in_conns[i]->filter_src_fwnode) { + in = csdev->pdata->in_conns[i]->filter_src_dev; + if (!in) + continue; + } + if (coresight_device_is_tpdm(in)) { if (drvdata->dsb_esize || drvdata->cmb_esize) return -EEXIST; @@ -124,7 +134,6 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata, } } - return rc; }