@@ -45,6 +45,26 @@ data-pins {
bias-pull-up;
};
};
+
+ pcie2_default_state: pcie2-default-state {
+ perst-n-pins {
+ pins = "gpio31";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ output-low;
+ };
+ };
+
+ pcie3_default_state: pcie3-default-state {
+ perst-n-pins {
+ pins = "gpio34";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ output-low;
+ };
+ };
};
&uart1 {
@@ -57,3 +77,26 @@ &xo_board {
clock-frequency = <24000000>;
};
+&pcie2_phy {
+ status = "okay";
+};
+
+&pcie2 {
+ pinctrl-0 = <&pcie2_default_state>;
+ pinctrl-names = "default";
+
+ perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pcie3_phy {
+ status = "okay";
+};
+
+&pcie3 {
+ pinctrl-0 = <&pcie3_default_state>;
+ pinctrl-names = "default";
+
+ perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
Enable the PCIe controller and PHY nodes corresponding to RDP466. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++ 1 file changed, 43 insertions(+)