| Message ID | 20250415-topic-sm8x50-iris-v10-v6-7-8ad319094055@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | media: qcom: iris: add support for SM8650 | expand |
On 4/15/2025 7:17 PM, Neil Armstrong wrote: > Add support for the SM8650 platform by re-using the SM8550 > definitions and using the vpu33 ops. > > Move the reset tables that diffes in a per-SoC platform > header, that will contain mode SoC specific data when > more codecs are introduced. > > The SM8650/vpu33 requires more reset lines, but the H.264 > decoder capabilities are identical. > > Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > .../platform/qcom/iris/iris_platform_common.h | 1 + > .../media/platform/qcom/iris/iris_platform_gen2.c | 65 +++++++++++++++++++++- > .../platform/qcom/iris/iris_platform_sm8550.h | 11 ++++ > .../platform/qcom/iris/iris_platform_sm8650.h | 13 +++++ > drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ > 5 files changed, 92 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h > index fdd40fd80178c4c66b37e392d07a0a62f492f108..6bc3a7975b04d612f6c89206eae95dac678695fc 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_common.h > +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h > @@ -35,6 +35,7 @@ enum pipe_type { > > extern struct iris_platform_data sm8250_data; > extern struct iris_platform_data sm8550_data; > +extern struct iris_platform_data sm8650_data; > > enum platform_clk_type { > IRIS_AXI_CLK, > diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > index 35d278996c430f2856d0fe59586930061a271c3e..6d1771bd68689d96b5b9087b0ad32b934f7295ee 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c > +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > @@ -10,6 +10,9 @@ > #include "iris_platform_common.h" > #include "iris_vpu_common.h" > > +#include "iris_platform_sm8550.h" > +#include "iris_platform_sm8650.h" > + > #define VIDEO_ARCH_LX 1 > > static struct platform_inst_fw_cap inst_fw_cap_sm8550[] = { > @@ -142,8 +145,6 @@ static const struct icc_info sm8550_icc_table[] = { > { "video-mem", 1000, 15000000 }, > }; > > -static const char * const sm8550_clk_reset_table[] = { "bus" }; > - > static const struct bw_info sm8550_bw_table_dec[] = { > { ((4096 * 2160) / 256) * 60, 1608000 }, > { ((4096 * 2160) / 256) * 30, 826000 }, > @@ -264,3 +265,63 @@ struct iris_platform_data sm8550_data = { > .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > }; > + > +/* > + * Shares most of SM8550 data except: > + * - vpu_ops to iris_vpu33_ops > + * - clk_rst_tbl to sm8650_clk_reset_table > + * - controller_rst_tbl to sm8650_controller_reset_table > + * - fwname to "qcom/vpu/vpu33_p4.mbn" > + */ > +struct iris_platform_data sm8650_data = { > + .get_instance = iris_hfi_gen2_get_instance, > + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, > + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, > + .vpu_ops = &iris_vpu33_ops, > + .set_preset_registers = iris_set_sm8550_preset_registers, > + .icc_tbl = sm8550_icc_table, > + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), > + .clk_rst_tbl = sm8650_clk_reset_table, > + .clk_rst_tbl_size = ARRAY_SIZE(sm8650_clk_reset_table), > + .controller_rst_tbl = sm8650_controller_reset_table, > + .controller_rst_tbl_size = ARRAY_SIZE(sm8650_controller_reset_table), > + .bw_tbl_dec = sm8550_bw_table_dec, > + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), > + .pmdomain_tbl = sm8550_pmdomain_table, > + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), > + .opp_pd_tbl = sm8550_opp_pd_table, > + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), > + .clk_tbl = sm8550_clk_table, > + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), > + /* Upper bound of DMA address range */ > + .dma_mask = 0xe0000000 - 1, > + .fwname = "qcom/vpu/vpu33_p4.mbn", > + .pas_id = IRIS_PAS_ID, > + .inst_caps = &platform_inst_cap_sm8550, > + .inst_fw_caps = inst_fw_cap_sm8550, > + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8550), > + .tz_cp_config_data = &tz_cp_config_sm8550, > + .core_arch = VIDEO_ARCH_LX, > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > + .ubwc_config = &ubwc_config_sm8550, > + .num_vpp_pipe = 4, > + .max_session_count = 16, > + .max_core_mbpf = ((8192 * 4352) / 256) * 2, > + .input_config_params = > + sm8550_vdec_input_config_params, > + .input_config_params_size = > + ARRAY_SIZE(sm8550_vdec_input_config_params), > + .output_config_params = > + sm8550_vdec_output_config_params, > + .output_config_params_size = > + ARRAY_SIZE(sm8550_vdec_output_config_params), > + .dec_input_prop = sm8550_vdec_subscribe_input_properties, > + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), > + .dec_output_prop = sm8550_vdec_subscribe_output_properties, > + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), > + > + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, > + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), > + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > +}; > diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8550.h b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h > new file mode 100644 > index 0000000000000000000000000000000000000000..ac8847edb585e4a9ce6b669a3a5988e7809972af > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h > @@ -0,0 +1,11 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#ifndef __IRIS_PLATFORM_SM8550_H__ > +#define __IRIS_PLATFORM_SM8550_H__ > + > +static const char * const sm8550_clk_reset_table[] = { "bus" }; > + > +#endif There is no need of iris_platform_sm8550.h, you can keep this entry in gen2.c file itself. As we are making that our base. You can just have iris_platform_sm8650.h which overrides this entry with SOC specific reset requirements for SM8650. Thanks, Dikshita > diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8650.h b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h > new file mode 100644 > index 0000000000000000000000000000000000000000..75e9d572e788de043a56cf85a4cb634bd02226b9 > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#ifndef __IRIS_PLATFORM_SM8650_H__ > +#define __IRIS_PLATFORM_SM8650_H__ > + > +static const char * const sm8650_clk_reset_table[] = { "bus", "core" }; > + > +static const char * const sm8650_controller_reset_table[] = { "xo" }; > + > +#endif > diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c > index 4f8bce6e2002bffee4c93dcaaf6e52bf4e40992e..7cd8650fbe9c09598670530103e3d5edf32953e7 100644 > --- a/drivers/media/platform/qcom/iris/iris_probe.c > +++ b/drivers/media/platform/qcom/iris/iris_probe.c > @@ -345,6 +345,10 @@ static const struct of_device_id iris_dt_match[] = { > .data = &sm8250_data, > }, > #endif > + { > + .compatible = "qcom,sm8650-iris", > + .data = &sm8650_data, > + }, > { }, > }; > MODULE_DEVICE_TABLE(of, iris_dt_match); >
On Wed, Apr 16, 2025 at 03:55:35PM +0530, Dikshita Agarwal wrote: > > > On 4/15/2025 7:17 PM, Neil Armstrong wrote: > > Add support for the SM8650 platform by re-using the SM8550 > > definitions and using the vpu33 ops. > > > > Move the reset tables that diffes in a per-SoC platform > > header, that will contain mode SoC specific data when > > more codecs are introduced. > > > > The SM8650/vpu33 requires more reset lines, but the H.264 > > decoder capabilities are identical. > > > > Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > > --- > > .../platform/qcom/iris/iris_platform_common.h | 1 + > > .../media/platform/qcom/iris/iris_platform_gen2.c | 65 +++++++++++++++++++++- > > .../platform/qcom/iris/iris_platform_sm8550.h | 11 ++++ > > .../platform/qcom/iris/iris_platform_sm8650.h | 13 +++++ > > drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ > > 5 files changed, 92 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h > > index fdd40fd80178c4c66b37e392d07a0a62f492f108..6bc3a7975b04d612f6c89206eae95dac678695fc 100644 > > --- a/drivers/media/platform/qcom/iris/iris_platform_common.h > > +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h > > @@ -35,6 +35,7 @@ enum pipe_type { > > > > extern struct iris_platform_data sm8250_data; > > extern struct iris_platform_data sm8550_data; > > +extern struct iris_platform_data sm8650_data; > > > > enum platform_clk_type { > > IRIS_AXI_CLK, > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > > index 35d278996c430f2856d0fe59586930061a271c3e..6d1771bd68689d96b5b9087b0ad32b934f7295ee 100644 > > --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c > > +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > > @@ -10,6 +10,9 @@ > > #include "iris_platform_common.h" > > #include "iris_vpu_common.h" > > > > +#include "iris_platform_sm8550.h" > > +#include "iris_platform_sm8650.h" > > + > > #define VIDEO_ARCH_LX 1 > > > > static struct platform_inst_fw_cap inst_fw_cap_sm8550[] = { > > @@ -142,8 +145,6 @@ static const struct icc_info sm8550_icc_table[] = { > > { "video-mem", 1000, 15000000 }, > > }; > > > > -static const char * const sm8550_clk_reset_table[] = { "bus" }; > > - > > static const struct bw_info sm8550_bw_table_dec[] = { > > { ((4096 * 2160) / 256) * 60, 1608000 }, > > { ((4096 * 2160) / 256) * 30, 826000 }, > > @@ -264,3 +265,63 @@ struct iris_platform_data sm8550_data = { > > .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > > .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > > }; > > + > > +/* > > + * Shares most of SM8550 data except: > > + * - vpu_ops to iris_vpu33_ops > > + * - clk_rst_tbl to sm8650_clk_reset_table > > + * - controller_rst_tbl to sm8650_controller_reset_table > > + * - fwname to "qcom/vpu/vpu33_p4.mbn" > > + */ > > +struct iris_platform_data sm8650_data = { > > + .get_instance = iris_hfi_gen2_get_instance, > > + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, > > + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, > > + .vpu_ops = &iris_vpu33_ops, > > + .set_preset_registers = iris_set_sm8550_preset_registers, > > + .icc_tbl = sm8550_icc_table, > > + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), > > + .clk_rst_tbl = sm8650_clk_reset_table, > > + .clk_rst_tbl_size = ARRAY_SIZE(sm8650_clk_reset_table), > > + .controller_rst_tbl = sm8650_controller_reset_table, > > + .controller_rst_tbl_size = ARRAY_SIZE(sm8650_controller_reset_table), > > + .bw_tbl_dec = sm8550_bw_table_dec, > > + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), > > + .pmdomain_tbl = sm8550_pmdomain_table, > > + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), > > + .opp_pd_tbl = sm8550_opp_pd_table, > > + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), > > + .clk_tbl = sm8550_clk_table, > > + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), > > + /* Upper bound of DMA address range */ > > + .dma_mask = 0xe0000000 - 1, > > + .fwname = "qcom/vpu/vpu33_p4.mbn", > > + .pas_id = IRIS_PAS_ID, > > + .inst_caps = &platform_inst_cap_sm8550, > > + .inst_fw_caps = inst_fw_cap_sm8550, > > + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8550), > > + .tz_cp_config_data = &tz_cp_config_sm8550, > > + .core_arch = VIDEO_ARCH_LX, > > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > > + .ubwc_config = &ubwc_config_sm8550, > > + .num_vpp_pipe = 4, > > + .max_session_count = 16, > > + .max_core_mbpf = ((8192 * 4352) / 256) * 2, > > + .input_config_params = > > + sm8550_vdec_input_config_params, > > + .input_config_params_size = > > + ARRAY_SIZE(sm8550_vdec_input_config_params), > > + .output_config_params = > > + sm8550_vdec_output_config_params, > > + .output_config_params_size = > > + ARRAY_SIZE(sm8550_vdec_output_config_params), > > + .dec_input_prop = sm8550_vdec_subscribe_input_properties, > > + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), > > + .dec_output_prop = sm8550_vdec_subscribe_output_properties, > > + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), > > + > > + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, > > + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), > > + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > > + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > > +}; > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8550.h b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h > > new file mode 100644 > > index 0000000000000000000000000000000000000000..ac8847edb585e4a9ce6b669a3a5988e7809972af > > --- /dev/null > > +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h > > @@ -0,0 +1,11 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > +/* > > + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > + > > +#ifndef __IRIS_PLATFORM_SM8550_H__ > > +#define __IRIS_PLATFORM_SM8550_H__ > > + > > +static const char * const sm8550_clk_reset_table[] = { "bus" }; > > + > > +#endif > There is no need of iris_platform_sm8550.h, you can keep this entry in > gen2.c file itself. As we are making that our base. That would make it unsymmetrical. I think having a separate header is a better option. > You can just have iris_platform_sm8650.h which overrides this entry with > SOC specific reset requirements for SM8650. > > Thanks, > Dikshita > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8650.h b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h > > new file mode 100644 > > index 0000000000000000000000000000000000000000..75e9d572e788de043a56cf85a4cb634bd02226b9 > > --- /dev/null > > +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h > > @@ -0,0 +1,13 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > +/* > > + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > + > > +#ifndef __IRIS_PLATFORM_SM8650_H__ > > +#define __IRIS_PLATFORM_SM8650_H__ > > + > > +static const char * const sm8650_clk_reset_table[] = { "bus", "core" }; > > + > > +static const char * const sm8650_controller_reset_table[] = { "xo" }; > > + > > +#endif > > diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c > > index 4f8bce6e2002bffee4c93dcaaf6e52bf4e40992e..7cd8650fbe9c09598670530103e3d5edf32953e7 100644 > > --- a/drivers/media/platform/qcom/iris/iris_probe.c > > +++ b/drivers/media/platform/qcom/iris/iris_probe.c > > @@ -345,6 +345,10 @@ static const struct of_device_id iris_dt_match[] = { > > .data = &sm8250_data, > > }, > > #endif > > + { > > + .compatible = "qcom,sm8650-iris", > > + .data = &sm8650_data, > > + }, > > { }, > > }; > > MODULE_DEVICE_TABLE(of, iris_dt_match); > >
On 4/16/2025 4:53 PM, Dmitry Baryshkov wrote: > On Wed, Apr 16, 2025 at 03:55:35PM +0530, Dikshita Agarwal wrote: >> >> >> On 4/15/2025 7:17 PM, Neil Armstrong wrote: >>> Add support for the SM8650 platform by re-using the SM8550 >>> definitions and using the vpu33 ops. >>> >>> Move the reset tables that diffes in a per-SoC platform >>> header, that will contain mode SoC specific data when >>> more codecs are introduced. >>> >>> The SM8650/vpu33 requires more reset lines, but the H.264 >>> decoder capabilities are identical. >>> >>> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell >>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >>> --- >>> .../platform/qcom/iris/iris_platform_common.h | 1 + >>> .../media/platform/qcom/iris/iris_platform_gen2.c | 65 +++++++++++++++++++++- >>> .../platform/qcom/iris/iris_platform_sm8550.h | 11 ++++ >>> .../platform/qcom/iris/iris_platform_sm8650.h | 13 +++++ >>> drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ >>> 5 files changed, 92 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h >>> index fdd40fd80178c4c66b37e392d07a0a62f492f108..6bc3a7975b04d612f6c89206eae95dac678695fc 100644 >>> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h >>> @@ -35,6 +35,7 @@ enum pipe_type { >>> >>> extern struct iris_platform_data sm8250_data; >>> extern struct iris_platform_data sm8550_data; >>> +extern struct iris_platform_data sm8650_data; >>> >>> enum platform_clk_type { >>> IRIS_AXI_CLK, >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >>> index 35d278996c430f2856d0fe59586930061a271c3e..6d1771bd68689d96b5b9087b0ad32b934f7295ee 100644 >>> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >>> @@ -10,6 +10,9 @@ >>> #include "iris_platform_common.h" >>> #include "iris_vpu_common.h" >>> >>> +#include "iris_platform_sm8550.h" >>> +#include "iris_platform_sm8650.h" >>> + >>> #define VIDEO_ARCH_LX 1 >>> >>> static struct platform_inst_fw_cap inst_fw_cap_sm8550[] = { >>> @@ -142,8 +145,6 @@ static const struct icc_info sm8550_icc_table[] = { >>> { "video-mem", 1000, 15000000 }, >>> }; >>> >>> -static const char * const sm8550_clk_reset_table[] = { "bus" }; >>> - >>> static const struct bw_info sm8550_bw_table_dec[] = { >>> { ((4096 * 2160) / 256) * 60, 1608000 }, >>> { ((4096 * 2160) / 256) * 30, 826000 }, >>> @@ -264,3 +265,63 @@ struct iris_platform_data sm8550_data = { >>> .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >>> .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >>> }; >>> + >>> +/* >>> + * Shares most of SM8550 data except: >>> + * - vpu_ops to iris_vpu33_ops >>> + * - clk_rst_tbl to sm8650_clk_reset_table >>> + * - controller_rst_tbl to sm8650_controller_reset_table >>> + * - fwname to "qcom/vpu/vpu33_p4.mbn" >>> + */ >>> +struct iris_platform_data sm8650_data = { >>> + .get_instance = iris_hfi_gen2_get_instance, >>> + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, >>> + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, >>> + .vpu_ops = &iris_vpu33_ops, >>> + .set_preset_registers = iris_set_sm8550_preset_registers, >>> + .icc_tbl = sm8550_icc_table, >>> + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), >>> + .clk_rst_tbl = sm8650_clk_reset_table, >>> + .clk_rst_tbl_size = ARRAY_SIZE(sm8650_clk_reset_table), >>> + .controller_rst_tbl = sm8650_controller_reset_table, >>> + .controller_rst_tbl_size = ARRAY_SIZE(sm8650_controller_reset_table), >>> + .bw_tbl_dec = sm8550_bw_table_dec, >>> + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), >>> + .pmdomain_tbl = sm8550_pmdomain_table, >>> + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), >>> + .opp_pd_tbl = sm8550_opp_pd_table, >>> + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), >>> + .clk_tbl = sm8550_clk_table, >>> + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), >>> + /* Upper bound of DMA address range */ >>> + .dma_mask = 0xe0000000 - 1, >>> + .fwname = "qcom/vpu/vpu33_p4.mbn", >>> + .pas_id = IRIS_PAS_ID, >>> + .inst_caps = &platform_inst_cap_sm8550, >>> + .inst_fw_caps = inst_fw_cap_sm8550, >>> + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8550), >>> + .tz_cp_config_data = &tz_cp_config_sm8550, >>> + .core_arch = VIDEO_ARCH_LX, >>> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, >>> + .ubwc_config = &ubwc_config_sm8550, >>> + .num_vpp_pipe = 4, >>> + .max_session_count = 16, >>> + .max_core_mbpf = ((8192 * 4352) / 256) * 2, >>> + .input_config_params = >>> + sm8550_vdec_input_config_params, >>> + .input_config_params_size = >>> + ARRAY_SIZE(sm8550_vdec_input_config_params), >>> + .output_config_params = >>> + sm8550_vdec_output_config_params, >>> + .output_config_params_size = >>> + ARRAY_SIZE(sm8550_vdec_output_config_params), >>> + .dec_input_prop = sm8550_vdec_subscribe_input_properties, >>> + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), >>> + .dec_output_prop = sm8550_vdec_subscribe_output_properties, >>> + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), >>> + >>> + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, >>> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), >>> + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >>> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >>> +}; >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8550.h b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h >>> new file mode 100644 >>> index 0000000000000000000000000000000000000000..ac8847edb585e4a9ce6b669a3a5988e7809972af >>> --- /dev/null >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h >>> @@ -0,0 +1,11 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> +/* >>> + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. >>> + */ >>> + >>> +#ifndef __IRIS_PLATFORM_SM8550_H__ >>> +#define __IRIS_PLATFORM_SM8550_H__ >>> + >>> +static const char * const sm8550_clk_reset_table[] = { "bus" }; >>> + >>> +#endif >> There is no need of iris_platform_sm8550.h, you can keep this entry in >> gen2.c file itself. As we are making that our base. > > That would make it unsymmetrical. I think having a separate header is a > better option. > It can never by symmetrical anyways. As we add new SOCs, Some other platform data might differ for that SOC. And then SOC specific file will have that entry only. We won't be taking out that table from common and have it in all SOC platform files to make it symmetrical again. Thanks, Dikshita >> You can just have iris_platform_sm8650.h which overrides this entry with >> SOC specific reset requirements for SM8650. >> >> Thanks, >> Dikshita >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8650.h b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h >>> new file mode 100644 >>> index 0000000000000000000000000000000000000000..75e9d572e788de043a56cf85a4cb634bd02226b9 >>> --- /dev/null >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h >>> @@ -0,0 +1,13 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> +/* >>> + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. >>> + */ >>> + >>> +#ifndef __IRIS_PLATFORM_SM8650_H__ >>> +#define __IRIS_PLATFORM_SM8650_H__ >>> + >>> +static const char * const sm8650_clk_reset_table[] = { "bus", "core" }; >>> + >>> +static const char * const sm8650_controller_reset_table[] = { "xo" }; >>> + >>> +#endif >>> diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c >>> index 4f8bce6e2002bffee4c93dcaaf6e52bf4e40992e..7cd8650fbe9c09598670530103e3d5edf32953e7 100644 >>> --- a/drivers/media/platform/qcom/iris/iris_probe.c >>> +++ b/drivers/media/platform/qcom/iris/iris_probe.c >>> @@ -345,6 +345,10 @@ static const struct of_device_id iris_dt_match[] = { >>> .data = &sm8250_data, >>> }, >>> #endif >>> + { >>> + .compatible = "qcom,sm8650-iris", >>> + .data = &sm8650_data, >>> + }, >>> { }, >>> }; >>> MODULE_DEVICE_TABLE(of, iris_dt_match); >>> >
diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index fdd40fd80178c4c66b37e392d07a0a62f492f108..6bc3a7975b04d612f6c89206eae95dac678695fc 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -35,6 +35,7 @@ enum pipe_type { extern struct iris_platform_data sm8250_data; extern struct iris_platform_data sm8550_data; +extern struct iris_platform_data sm8650_data; enum platform_clk_type { IRIS_AXI_CLK, diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 35d278996c430f2856d0fe59586930061a271c3e..6d1771bd68689d96b5b9087b0ad32b934f7295ee 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -10,6 +10,9 @@ #include "iris_platform_common.h" #include "iris_vpu_common.h" +#include "iris_platform_sm8550.h" +#include "iris_platform_sm8650.h" + #define VIDEO_ARCH_LX 1 static struct platform_inst_fw_cap inst_fw_cap_sm8550[] = { @@ -142,8 +145,6 @@ static const struct icc_info sm8550_icc_table[] = { { "video-mem", 1000, 15000000 }, }; -static const char * const sm8550_clk_reset_table[] = { "bus" }; - static const struct bw_info sm8550_bw_table_dec[] = { { ((4096 * 2160) / 256) * 60, 1608000 }, { ((4096 * 2160) / 256) * 30, 826000 }, @@ -264,3 +265,63 @@ struct iris_platform_data sm8550_data = { .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), }; + +/* + * Shares most of SM8550 data except: + * - vpu_ops to iris_vpu33_ops + * - clk_rst_tbl to sm8650_clk_reset_table + * - controller_rst_tbl to sm8650_controller_reset_table + * - fwname to "qcom/vpu/vpu33_p4.mbn" + */ +struct iris_platform_data sm8650_data = { + .get_instance = iris_hfi_gen2_get_instance, + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, + .vpu_ops = &iris_vpu33_ops, + .set_preset_registers = iris_set_sm8550_preset_registers, + .icc_tbl = sm8550_icc_table, + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), + .clk_rst_tbl = sm8650_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(sm8650_clk_reset_table), + .controller_rst_tbl = sm8650_controller_reset_table, + .controller_rst_tbl_size = ARRAY_SIZE(sm8650_controller_reset_table), + .bw_tbl_dec = sm8550_bw_table_dec, + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), + .pmdomain_tbl = sm8550_pmdomain_table, + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), + .opp_pd_tbl = sm8550_opp_pd_table, + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), + .clk_tbl = sm8550_clk_table, + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), + /* Upper bound of DMA address range */ + .dma_mask = 0xe0000000 - 1, + .fwname = "qcom/vpu/vpu33_p4.mbn", + .pas_id = IRIS_PAS_ID, + .inst_caps = &platform_inst_cap_sm8550, + .inst_fw_caps = inst_fw_cap_sm8550, + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8550), + .tz_cp_config_data = &tz_cp_config_sm8550, + .core_arch = VIDEO_ARCH_LX, + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, + .ubwc_config = &ubwc_config_sm8550, + .num_vpp_pipe = 4, + .max_session_count = 16, + .max_core_mbpf = ((8192 * 4352) / 256) * 2, + .input_config_params = + sm8550_vdec_input_config_params, + .input_config_params_size = + ARRAY_SIZE(sm8550_vdec_input_config_params), + .output_config_params = + sm8550_vdec_output_config_params, + .output_config_params_size = + ARRAY_SIZE(sm8550_vdec_output_config_params), + .dec_input_prop = sm8550_vdec_subscribe_input_properties, + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), + .dec_output_prop = sm8550_vdec_subscribe_output_properties, + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), + + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), +}; diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8550.h b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h new file mode 100644 index 0000000000000000000000000000000000000000..ac8847edb585e4a9ce6b669a3a5988e7809972af --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8550.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_SM8550_H__ +#define __IRIS_PLATFORM_SM8550_H__ + +static const char * const sm8550_clk_reset_table[] = { "bus" }; + +#endif diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8650.h b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h new file mode 100644 index 0000000000000000000000000000000000000000..75e9d572e788de043a56cf85a4cb634bd02226b9 --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8650.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_SM8650_H__ +#define __IRIS_PLATFORM_SM8650_H__ + +static const char * const sm8650_clk_reset_table[] = { "bus", "core" }; + +static const char * const sm8650_controller_reset_table[] = { "xo" }; + +#endif diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c index 4f8bce6e2002bffee4c93dcaaf6e52bf4e40992e..7cd8650fbe9c09598670530103e3d5edf32953e7 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -345,6 +345,10 @@ static const struct of_device_id iris_dt_match[] = { .data = &sm8250_data, }, #endif + { + .compatible = "qcom,sm8650-iris", + .data = &sm8650_data, + }, { }, }; MODULE_DEVICE_TABLE(of, iris_dt_match);