@@ -894,6 +894,66 @@ &gpu {
status = "okay";
};
+&camcc {
+ status = "okay";
+};
+
+&camss {
+ vdd-csiphy-0p8-supply = <&vreg_l2c_0p8>;
+ vdd-csiphy-1p2-supply = <&vreg_l1c_1p2>;
+
+ status = "okay";
+
+ ports {
+ /*
+ * port0 => csiphy0
+ * port1 => csiphy1
+ * port2 => csiphy2
+ * port3 => csiphy4
+ */
+ port@3 {
+ csiphy4_ep: endpoint@4 {
+ reg = <4>;
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&ov08x40_ep>;
+ };
+ };
+ };
+};
+
+&cci1 {
+ status = "okay";
+};
+
+&cci1_i2c1 {
+ camera@36 {
+ compatible = "ovti,ov08x40";
+ reg = <0x36>;
+
+ reset-gpios = <&tlmm 237 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam_rgb_default>;
+
+ clocks = <&camcc CAM_CC_MCLK4_CLK>;
+ assigned-clocks = <&camcc CAM_CC_MCLK4_CLK>;
+ assigned-clock-rates = <19200000>;
+
+ orientation = <0>; /* front facing */
+
+ avdd-supply = <&vreg_l7b_2p8>;
+ dovdd-supply = <&vreg_l3m_1p8>;
+
+ port {
+ ov08x40_ep: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <400000000>;
+ remote-endpoint = <&csiphy4_ep>;
+ };
+ };
+ };
+};
+
&i2c0 {
clock-frequency = <400000>;
Define ov08x40 on cci1_i2c1. The RGB sensor appears on the AON CCI pins connected to CSIPHY4 in four lane mode. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- arch/arm64/boot/dts/qcom/x1-crd.dtsi | 60 ++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+)