@@ -3,7 +3,7 @@
* IPQ9574 SoC device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023-2025, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/clock/qcom,apss-ipq.h>
@@ -226,6 +226,11 @@ smem@4aa00000 {
hwlocks = <&tcsr_mutex 3>;
no-map;
};
+
+ q6_region: wcss@4ab00000 {
+ reg = <0x0 0x4ab00000 0x0 0x2b00000>;
+ no-map;
+ };
};
soc: soc@0 {
@@ -1251,6 +1256,35 @@ nsscc: clock-controller@39b00000 {
#reset-cells = <1>;
#interconnect-cells = <1>;
};
+
+ q6v5_wcss: remoteproc@cd00000 {
+ compatible = "qcom,ipq9574-wcss-sec-pil";
+ reg = <0x0cd00000 0x4040>;
+ firmware-name = "ath11k/IPQ9574/hw1.0/q6_fw.mbn";
+ interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_wcss_in 0 IRQ_TYPE_NONE>,
+ <&smp2p_wcss_in 1 IRQ_TYPE_NONE>,
+ <&smp2p_wcss_in 2 IRQ_TYPE_NONE>,
+ <&smp2p_wcss_in 3 IRQ_TYPE_NONE>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ qcom,smem-states = <&smp2p_wcss_out 1>,
+ <&smp2p_wcss_out 0>;
+ qcom,smem-state-names = "stop",
+ "shutdown";
+ memory-region = <&q6_region>;
+
+ glink-edge {
+ interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+ label = "rtr";
+ qcom,remote-pid = <1>;
+ mboxes = <&apcs_glb 8>;
+ };
+ };
};
thermal-zones {
@@ -1482,4 +1516,28 @@ timer {
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+
+ wcss: smp2p-wcss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_SPI 322 IRQ_TYPE_EDGE_RISING>;
+
+ mboxes = <&apcs_glb 9>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ smp2p_wcss_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_wcss_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};