From patchwork Sun May 25 19:25:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Knecht via B4 Relay X-Patchwork-Id: 892808 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3046B25A350; Sun, 25 May 2025 19:25:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748201105; cv=none; b=BgnEOhHKBjwmJ3e76AsjPRUNjyOktVHiMxyHun6eApHlVhbYkQwCDbhT/cTF7g9NWo6ycHJh7Z/925Oq+TXtnk5W6MIzcvdhVOyCNuE8+KdMygXlFpp8/cqQp/8b0x1IxmAesNbHpQ87PptFC3T2oWBtpaxAwgHUDyKv37KQoIw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748201105; c=relaxed/simple; bh=P5YZHYMBuxGN/if7ZMeIgF/uu9PRs4ZqEW+UoS5c1Sc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I+RkrRhZmJDyIZWkEgMsPgb62HjofOCOcvBP7dOH6ipwWDuGwHiqIEq+nv/g4MMKZVBiftbaXYLlHwCj2ROHZxUtpyMLUNqinWMzV9x/T1lYPl8EICRl1xmte4QOiFuJhWjmrZHXst8WBIhCr8AWayEK5h5rrXV4RspWGjeHLd0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PxxXF1f+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PxxXF1f+" Received: by smtp.kernel.org (Postfix) with ESMTPS id B00CAC4CEF1; Sun, 25 May 2025 19:25:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748201104; bh=P5YZHYMBuxGN/if7ZMeIgF/uu9PRs4ZqEW+UoS5c1Sc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PxxXF1f+wrpR4l2qJ3A9XgeLwMUZRAyw/HssxDuscsEXAFRcAAA3eu7mRw0JTSr0H WNHReKHR3kUI4jz0vNTeL9pF1L9Qt6i1pWHkE7I+VyVoe1SP4bDmPIcL72+TDoi16E Iip7lONrmFldbef6/bz0JQhlRsYYq+eK4vy9J/Y3TXgH6uu4vBnIvFX9d38nhwBJHo 38JzLUJ5sz0z7kjiL6rTzMnT2TWGVmgKT3SNxVZpLRoXTZt8yrKEikehteNfED6eA/ AMtUhhZJmnOx/YRYqEl/m2oXVUDfoXLDyXsb5Tmm0PAI4sBDVGsfOKxliaqOUWLVPt D+Rx9FRyFEd1g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E78AC5B542; Sun, 25 May 2025 19:25:04 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Sun, 25 May 2025 21:25:03 +0200 Subject: [PATCH v2 3/4] media: dt-bindings: Add qcom,msm8939-camss Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250525-camss-8x39-vbif-v2-3-6d3d5c5af456@mailoo.org> References: <20250525-camss-8x39-vbif-v2-0-6d3d5c5af456@mailoo.org> In-Reply-To: <20250525-camss-8x39-vbif-v2-0-6d3d5c5af456@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748201103; l=7806; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=/SQ0WMJnRjbAm7ftCb3NRJ3E8Q5yUCv/67szqvZfAPI=; b=1rG7OfDyrivde7KAR4Cmq2sU5drP8CXOZncKG7fCff+fMWNvFN77/6Gn6kmxQR5bnk+tJYzsI a8CjsY0PetyDjQSVYZgeOYzAOh7Ar3v3jXB+WX7fcNUapvfRncga2YT X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Signed-off-by: Vincent Knecht --- .../bindings/media/qcom,msm8939-camss.yaml | 253 +++++++++++++++++++++ 1 file changed, 253 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..592b847433d7a788d8c1635129dd408cb0112073 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml @@ -0,0 +1,253 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) + +maintainers: + - Vincent Knecht + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8939-camss + + reg: + maxItems: 11 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csi_clk_mux + - const: ispif + - const: vfe0 + - const: vfe0_vbif + + clocks: + maxItems: 24 + + clock-names: + items: + - const: ahb + - const: csi0 + - const: csi0_ahb + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1 + - const: csi1_ahb + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: csi2 + - const: csi2_ahb + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + - const: csiphy0_timer + - const: csiphy1_timer + - const: csi_vfe0 + - const: ispif_ahb + - const: top_ahb + - const: vfe0 + - const: vfe_ahb + - const: vfe_axi + + interrupts: + maxItems: 7 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: ispif + - const: vfe0 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. + + vdda-supply: + description: + Definition of the regulator used as analog power supply. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - power-domains + - vdda-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + isp@1b08000 { + compatible = "qcom,msm8939-camss"; + + reg = <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b08800 0x100>, + <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b00020 0x10>, + <0x01b0a000 0x500>, + <0x01b10000 0x1000>, + <0x01b40000 0x200>; + + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csi_clk_mux", + "ispif", + "vfe0", + "vfe0_vbif"; + + clocks = <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>; + + clock-names = "ahb", + "csi0", + "csi0_ahb", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1", + "csi1_ahb", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2", + "csi2_ahb", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csiphy0_timer", + "csiphy1_timer", + "csi_vfe0", + "ispif_ahb", + "top_ahb", + "vfe0", + "vfe_ahb", + "vfe_axi"; + + interrupts = , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "ispif", + "vfe0"; + + iommus = <&apps_iommu 3>; + + power-domains = <&gcc VFE_GDSC>; + + vdda-supply = <®_2v8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + csiphy1_ep: endpoint { + clock-lanes = <1>; + data-lanes = <0 2>; + remote-endpoint = <&sensor_ep>; + }; + }; + }; + };