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[209.132.180.67]) by mx.google.com with ESMTP id y24si10735800pgf.555.2019.02.18.04.36.03; Mon, 18 Feb 2019 04:36:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O787LItj; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730628AbfBRMgD (ORCPT + 15 others); Mon, 18 Feb 2019 07:36:03 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:38198 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730560AbfBRMgC (ORCPT ); Mon, 18 Feb 2019 07:36:02 -0500 Received: by mail-wm1-f67.google.com with SMTP id v26so16935890wmh.3 for ; Mon, 18 Feb 2019 04:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=ssMp2Pe32HI1MMC/wAOh7tQF9HUmue5BH2ZmF71FZeU=; b=O787LItjmkEXtGdpkelQdSlXmvzwr1PvV+JJj7+Zz3z2hhI2QqqYDIOJ1QvLtyv2fy 9vbqhAvhsJtmKZcTyCafuNQp8kXCGyhlp+2QLx8BX179kUXNU/TgneG3HZDYhgVDaGLg Q22F7ukU6y2DpVruvOicJQS3vYMuSiKRnNOjTyfvPkqOSC0eWGAuqUVvL7p1SPGh+q67 csCJQjhFYUl72gXfjUVA/OmnGjw210T/aRmXWE31bcAM/iMh3x3hxx3HkdCxijPnaKsW wx+nNR2v5CfztBbOmxLBKheEMH27RQgQw4hLdjMem/oX1vndOLmwhaBL2nC1yT26ln1p aQJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=ssMp2Pe32HI1MMC/wAOh7tQF9HUmue5BH2ZmF71FZeU=; b=cJD+SgFz8XpqEbiVclVr/WVWNefXtjHfUzLXrbgjljnXDpK/LlbTUxO/lsSYpy8rtZ zOxkeLoC9vc3ugNGxrPIL9WYBUOh6AfnpseXviEYDbjW0+sVR/DZA/QOie3g8Ia16u0H qEYgCYRkAIHR4LGME2+6MwWOLqr/VP2cfyo1FxHXoMtOUPa19mIq00dzef9qNGK+Ml/u sshcF/MVKaj1GvGJtOOVfXO4/VDcbXH3tb/48k0b7D0xCP6TtZAo2lImb8rtMFyV3xqC vzgq17Nrh9E4aJj1LG+CPBYGOIHULaxoiUkDGzw4XF7FdSh3um5HgQzXA9RLPOUA9m3n 840Q== X-Gm-Message-State: AHQUAuZ2/uRnOYyomR8AaccTz+D+sr6/sI+O8PxAfUIycCJ9Kiob/O83 5WuuhX9eIH1cfFPp9X2D3qDTYg== X-Received: by 2002:a1c:6306:: with SMTP id x6mr389506wmb.144.1550493360831; Mon, 18 Feb 2019 04:36:00 -0800 (PST) Received: from localhost ([49.248.190.152]) by smtp.gmail.com with ESMTPSA id h1sm15703213wmb.0.2019.02.18.04.35.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Feb 2019 04:36:00 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, David Brown Cc: devicetree@vger.kernel.org Subject: [PATCH v1 04/12] arm64: dts: msm8996: thermal: Add temperature sensors near major peripherals Date: Mon, 18 Feb 2019 18:05:18 +0530 Message-Id: <51feb49578f6e412eb5e80012dc63eab5532342b.1550493113.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org msm8996 has a total of 21 temperature sensors. Populate DT with information about them. There are 2 sensors on each of the cpus - one on the top, the other below (we only expose one on the top in DT for now). For the GPU, we expose both, the one on the top and the one below. Depending on the version of the silicon, sensor 2 is either placed near the L3 cache or the venus video decoder. It would've been nice to be able to be version-specific but we don't have DTs that differentiate the two versions of silicon yet. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 98 +++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index ae6e9f0778f0..8e36a39e1386 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -237,6 +237,104 @@ }; }; }; + + gpu-thermal-top { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 6>; + + trips { + gpu1_alert0: trip-point@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu1_crit: gpu_crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu-thermal-bottom { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 7>; + + trips { + gpu2_alert0: trip-point@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu2_crit: gpu_crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + m4m-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + }; + + l3_or_venus-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 2>; + }; + + cluster0-l2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 7>; + }; + + cluster1-l2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 12>; + }; + + camera-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 1>; + }; + + q6-dsp-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 2>; + }; + + mem-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 3>; + }; + + modemtx-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 4>; + }; }; timer {