| Message ID | 20250602053231.403143-1-pavitrakumarm@vayavyalabs.com |
|---|---|
| Headers | show |
| Series | Add SPAcc Crypto Driver | expand |
On 02/06/2025 07:32, Pavitrakumar Managutte wrote: > Add DT bindings related to the SPAcc driver for Documentation. > DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto > Engine is a crypto IP designed by Synopsys. > > Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com> > Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com> Where was this Ack given? It's not on the lists, it's not public, so it cannot be after your SoB. > --- > .../bindings/crypto/snps,dwc-spacc.yaml | 77 +++++++++++++++++++ > 1 file changed, 77 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > new file mode 100644 > index 000000000000..2780b3db2182 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/snps,dwc-spacc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Synopsys DesignWare Security Protocol Accelerator(SPAcc) Crypto Engine > + > +maintainers: > + - Ruud Derwig <Ruud.Derwig@synopsys.com> > + > +description: | > + This binding describes the Synopsys DWC Security Protocol Accelerator (SPAcc), Don't say that binding describes a binding. Describe here hardware. > + which is a hardware IP designed to accelerate cryptographic operations, such > + as encryption, decryption, and hashing. > + > + The SPAcc supports virtualization where a single physical SPAcc can be > + accessed as multiple virtual SPAcc instances, each with its own register set. > + These virtual instances can be assigned different priorities. > + > + In this configuration, the SPAcc IP is instantiated within the Synopsys > + NSIMOSCI virtual SoC platform, a SystemC simulation environment used for > + software development and testing. The device is accessed as a memory-mapped > + peripheral and generates interrupts to the ARC interrupt controller. > + > +properties: > + compatible: > + items: > + - const: snps,nsimosci-hs-spacc > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + snps,vspacc-id: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Virtual SPAcc instance identifier. > + The SPAcc hardware supports multiple virtual instances (determined by > + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify > + which virtual instance this node represents. No, IDs are not accepted. > + minimum: 0 > + maximum: 7 > + > + snps,spacc-internal-counter: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Hardware counter that generates an interrupt based on a count value. > + This counter starts ticking when there is a completed job sitting on > + the status fifo to be serviced. This makes sure that no jobs are > + starved of processing. Not a DT property. > + minimum: 0x19000 > + maximum: 0xFFFFF > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + Drop blank line. > + crypto@40000000 { > + compatible = "snps,nsimosci-hs-spacc"; > + reg = <0x40000000 0x3FFFF>; Lowercase hex only. Best regards, Krzysztof
On 02/06/2025 07:32, Pavitrakumar Managutte wrote: > Add DT bindings related to the SPAcc driver for Documentation. > DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto > Engine is a crypto IP designed by Synopsys. > > Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com> > Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com> > --- > .../bindings/crypto/snps,dwc-spacc.yaml | 77 +++++++++++++++++++ > 1 file changed, 77 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > new file mode 100644 > index 000000000000..2780b3db2182 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/snps,dwc-spacc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Synopsys DesignWare Security Protocol Accelerator(SPAcc) Crypto Engine > + > +maintainers: > + - Ruud Derwig <Ruud.Derwig@synopsys.com> One more thing, there was no public Ack for this. What's more, there were no emails EVER from Ruud. This has to be publicly Acked and Ruud needs to understand the obligations coming from being the maintainer here. Best regards, Krzysztof
Hello Krzysztof, > > +maintainers: > > + - Ruud Derwig <Ruud.Derwig@synopsys.com> > > One more thing, there was no public Ack for this. What's more, there were no emails EVER from Ruud. This has to be publicly Acked > and Ruud needs to understand the obligations coming from being the maintainer here. Yes, acknowledged. I'm aware of the obligations and have been working with the Vayavya team on this. Synopsys and I are committed to maintain this driver. Thanks for your help in getting this work in shape. Regards, Ruud.
Hi Krzysztof, Thanks for the inputs, my comments are embedded below. Warm regards, PK On Mon, Jun 2, 2025 at 11:28 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 02/06/2025 07:32, Pavitrakumar Managutte wrote: > > Add DT bindings related to the SPAcc driver for Documentation. > > DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto > > Engine is a crypto IP designed by Synopsys. > > > > Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > > Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > > Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com> > > Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com> > > Where was this Ack given? It's not on the lists, it's not public, so it > cannot be after your SoB. PK: Yes, its not on the mailing list. I will remove that. > > > --- > > .../bindings/crypto/snps,dwc-spacc.yaml | 77 +++++++++++++++++++ > > 1 file changed, 77 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > > > > diff --git a/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > > new file mode 100644 > > index 000000000000..2780b3db2182 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml > > @@ -0,0 +1,77 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/crypto/snps,dwc-spacc.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Synopsys DesignWare Security Protocol Accelerator(SPAcc) Crypto Engine > > + > > +maintainers: > > + - Ruud Derwig <Ruud.Derwig@synopsys.com> > > + > > +description: | > > + This binding describes the Synopsys DWC Security Protocol Accelerator (SPAcc), > > Don't say that binding describes a binding. Describe here hardware. PK: Sure, I will fix that. > > > + which is a hardware IP designed to accelerate cryptographic operations, such > > + as encryption, decryption, and hashing. > > + > > + The SPAcc supports virtualization where a single physical SPAcc can be > > + accessed as multiple virtual SPAcc instances, each with its own register set. > > + These virtual instances can be assigned different priorities. > > + > > + In this configuration, the SPAcc IP is instantiated within the Synopsys > > + NSIMOSCI virtual SoC platform, a SystemC simulation environment used for > > + software development and testing. The device is accessed as a memory-mapped > > + peripheral and generates interrupts to the ARC interrupt controller. > > + > > +properties: > > + compatible: > > + items: > > + - const: snps,nsimosci-hs-spacc > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + snps,vspacc-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: | > > + Virtual SPAcc instance identifier. > > + The SPAcc hardware supports multiple virtual instances (determined by > > + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify > > + which virtual instance this node represents. > > No, IDs are not accepted. PK: This represents the specific virtual SPAcc that is being used in the current configuration. It is used to index into the register banks and the context memories of the virtual SPAcc that is being used. The SPAcc IP can be configured as dedicated virtual SPAccs in heterogeneous environments. This was also discssed with Rob Herring and updated from "vpsacc-index" to "vspacc-id" based on Rob's inputs https://lore.kernel.org/linux-crypto/CALxtO0mkmyaDYta0tfx9Q1qi_GY0OwUoFDDVmcL15UH_fEZ25w@mail.gmail.com/ > > > + minimum: 0 > > + maximum: 7 > > + > > + snps,spacc-internal-counter: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: | > > + Hardware counter that generates an interrupt based on a count value. > > + This counter starts ticking when there is a completed job sitting on > > + the status fifo to be serviced. This makes sure that no jobs are > > + starved of processing. > > Not a DT property. PK: This is a hardware counter which starts ticking when a processed job is sitting on the STAT FIFO. This makes sure a JOB does not stay in STATUS FIFO unprocessed. This was called watchdog timer - wdtimer, which we renamed to "spacc-internal-counter" based on your inputs. https://lore.kernel.org/linux-crypto/CALxtO0k4RkopERap_ykrMTZ4Qtdzm8hEPJGLCQ2pknQGjfQ4Eg@mail.gmail.com/ If you think this "does not qualify" as a DT property, I will make this into a Kconfig input for the driver. > > > + minimum: 0x19000 > > + maximum: 0xFFFFF > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + > > Drop blank line. PK: I will fix that > > > + crypto@40000000 { > > + compatible = "snps,nsimosci-hs-spacc"; > > + reg = <0x40000000 0x3FFFF>; > > Lowercase hex only. PK: I will fix that > > > > Best regards, > Krzysztof
On 03/06/2025 13:45, Pavitrakumar Managutte wrote: > Hi Krzysztof, > Thanks for the inputs, my comments are embedded below. > > Warm regards, > PK > > On Mon, Jun 2, 2025 at 11:28 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 02/06/2025 07:32, Pavitrakumar Managutte wrote: >>> Add DT bindings related to the SPAcc driver for Documentation. >>> DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto >>> Engine is a crypto IP designed by Synopsys. >>> >>> Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> >>> Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> >>> Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com> >>> Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com> >> >> Where was this Ack given? It's not on the lists, it's not public, so it >> cannot be after your SoB. > > PK: Yes, its not on the mailing list. I will remove that. If it was given in private, then happened for sure before you sent the patch, so it should be above your SoB. ... >>> + >>> + snps,vspacc-id: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: | >>> + Virtual SPAcc instance identifier. >>> + The SPAcc hardware supports multiple virtual instances (determined by >>> + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify >>> + which virtual instance this node represents. >> >> No, IDs are not accepted. > > PK: This represents the specific virtual SPAcc that is being used in > the current configuration. It is used to index into the register banks > and the context memories of the virtual SPAcc that is being used. The > SPAcc IP can be configured as dedicated virtual SPAccs in > heterogeneous environments. OK. Why registers are not narrowed to only this instance? It feels like you provide here full register space for multiple devices and then select the bank with above ID. > This was also discssed with Rob Herring and updated from > "vpsacc-index" to "vspacc-id" based on Rob's inputs > https://lore.kernel.org/linux-crypto/CALxtO0mkmyaDYta0tfx9Q1qi_GY0OwUoFDDVmcL15UH_fEZ25w@mail.gmail.com/ Yeah, it is still ID and thus look at his comment about proper justification. > >> >>> + minimum: 0 >>> + maximum: 7 >>> + >>> + snps,spacc-internal-counter: >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: | >>> + Hardware counter that generates an interrupt based on a count value. >>> + This counter starts ticking when there is a completed job sitting on >>> + the status fifo to be serviced. This makes sure that no jobs are >>> + starved of processing. >> >> Not a DT property. > > PK: This is a hardware counter which starts ticking when a processed > job is sitting on the STAT FIFO. This makes sure a JOB does not stay > in STATUS FIFO unprocessed. > > This was called watchdog timer - wdtimer, which we renamed to > "spacc-internal-counter" based on your inputs. > https://lore.kernel.org/linux-crypto/CALxtO0k4RkopERap_ykrMTZ4Qtdzm8hEPJGLCQ2pknQGjfQ4Eg@mail.gmail.com/ I suggested to use watchdog schema if this device has a watchdog feature. Why would you configure here different values for the same hardware in different boards? Best regards, Krzysztof
Hi Krzysztof. Appreciate your inputs. My comments are embedded below. Warm regards, PK On Tue, Jun 3, 2025 at 5:34 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 03/06/2025 13:45, Pavitrakumar Managutte wrote: > > Hi Krzysztof, > > Thanks for the inputs, my comments are embedded below. > > > > Warm regards, > > PK > > > > On Mon, Jun 2, 2025 at 11:28 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > >> > >> On 02/06/2025 07:32, Pavitrakumar Managutte wrote: > >>> Add DT bindings related to the SPAcc driver for Documentation. > >>> DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto > >>> Engine is a crypto IP designed by Synopsys. > >>> > >>> Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > >>> Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com> > >>> Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com> > >>> Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com> > >> > >> Where was this Ack given? It's not on the lists, it's not public, so it > >> cannot be after your SoB. > > > > PK: Yes, its not on the mailing list. I will remove that. > > If it was given in private, then happened for sure before you sent the > patch, so it should be above your SoB. PK: Sure, I will fix that. Yes, that was an internal Ack. > > ... > > >>> + > >>> + snps,vspacc-id: > >>> + $ref: /schemas/types.yaml#/definitions/uint32 > >>> + description: | > >>> + Virtual SPAcc instance identifier. > >>> + The SPAcc hardware supports multiple virtual instances (determined by > >>> + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify > >>> + which virtual instance this node represents. > >> > >> No, IDs are not accepted. > > > > PK: This represents the specific virtual SPAcc that is being used in > > the current configuration. It is used to index into the register banks > > and the context memories of the virtual SPAcc that is being used. The > > SPAcc IP can be configured as dedicated virtual SPAccs in > > heterogeneous environments. > > OK. Why registers are not narrowed to only this instance? It feels like > you provide here full register space for multiple devices and then > select the bank with above ID. PK: No, we cant narrow the registers to only this instance since its is just a single SPAcc with multiple virtual SPAcc instances. The same set of registers(aka register banks) and context memories are repeated, but sit at different offset addresses (i*4000 + register-offsets). The crypto hardware engine inside is shared by all the virtual SPAccs. This is very much for a heterogeneous computing scenario. > > > > This was also discssed with Rob Herring and updated from > > "vpsacc-index" to "vspacc-id" based on Rob's inputs > > https://lore.kernel.org/linux-crypto/CALxtO0mkmyaDYta0tfx9Q1qi_GY0OwUoFDDVmcL15UH_fEZ25w@mail.gmail.com/ > > Yeah, it is still ID and thus look at his comment about proper > justification. PK: Agreed > > > > >> > >>> + minimum: 0 > >>> + maximum: 7 > >>> + > >>> + snps,spacc-internal-counter: > >>> + $ref: /schemas/types.yaml#/definitions/uint32 > >>> + description: | > >>> + Hardware counter that generates an interrupt based on a count value. > >>> + This counter starts ticking when there is a completed job sitting on > >>> + the status fifo to be serviced. This makes sure that no jobs are > >>> + starved of processing. > >> > >> Not a DT property. > > > > PK: This is a hardware counter which starts ticking when a processed > > job is sitting on the STAT FIFO. This makes sure a JOB does not stay > > in STATUS FIFO unprocessed. > > > > This was called watchdog timer - wdtimer, which we renamed to > > "spacc-internal-counter" based on your inputs. > > https://lore.kernel.org/linux-crypto/CALxtO0k4RkopERap_ykrMTZ4Qtdzm8hEPJGLCQ2pknQGjfQ4Eg@mail.gmail.com/ > > I suggested to use watchdog schema if this device has a watchdog feature. > > Why would you configure here different values for the same hardware in > different boards? PK: Agreed, it does not make sense to have this here in DT. I am moving this as a Kconfig option. > > > > Best regards, > Krzysztof
On 04/06/2025 14:20, Pavitrakumar Managutte wrote: >> >>>>> + >>>>> + snps,vspacc-id: >>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>> + description: | >>>>> + Virtual SPAcc instance identifier. >>>>> + The SPAcc hardware supports multiple virtual instances (determined by >>>>> + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify >>>>> + which virtual instance this node represents. >>>> >>>> No, IDs are not accepted. >>> >>> PK: This represents the specific virtual SPAcc that is being used in >>> the current configuration. It is used to index into the register banks >>> and the context memories of the virtual SPAcc that is being used. The >>> SPAcc IP can be configured as dedicated virtual SPAccs in >>> heterogeneous environments. >> >> OK. Why registers are not narrowed to only this instance? It feels like >> you provide here full register space for multiple devices and then >> select the bank with above ID. > > PK: No, we cant narrow the registers to only this instance since its > is just a single SPAcc with multiple virtual SPAcc instances. The same > set of registers(aka register banks) and context memories are > repeated, but sit at different offset addresses (i*4000 + > register-offsets). The crypto hardware engine inside is shared by all > the virtual SPAccs. This is very much for a heterogeneous computing > scenario. Then maybe you have one crypto engine? You ask us to guess all of this, also because you do not upstream the DTS for real product. Any mentioning of "virtual" already raises concerns... Best regards, Krzysztof
On 06/06/2025 13:02, Pavitrakumar Managutte wrote: > Hi Krzysztof, > Appreciate your inputs and feedback. My comments are embedded below. > > Warm regards, > PK > > On Wed, Jun 4, 2025 at 7:37 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 04/06/2025 14:20, Pavitrakumar Managutte wrote: >>>> >>>>>>> + >>>>>>> + snps,vspacc-id: >>>>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>>>> + description: | >>>>>>> + Virtual SPAcc instance identifier. >>>>>>> + The SPAcc hardware supports multiple virtual instances (determined by >>>>>>> + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify >>>>>>> + which virtual instance this node represents. >>>>>> >>>>>> No, IDs are not accepted. >>>>> >>>>> PK: This represents the specific virtual SPAcc that is being used in >>>>> the current configuration. It is used to index into the register banks >>>>> and the context memories of the virtual SPAcc that is being used. The >>>>> SPAcc IP can be configured as dedicated virtual SPAccs in >>>>> heterogeneous environments. >>>> >>>> OK. Why registers are not narrowed to only this instance? It feels like >>>> you provide here full register space for multiple devices and then >>>> select the bank with above ID. >>> >>> PK: No, we cant narrow the registers to only this instance since its >>> is just a single SPAcc with multiple virtual SPAcc instances. The same >>> set of registers(aka register banks) and context memories are >>> repeated, but sit at different offset addresses (i*4000 + >>> register-offsets). The crypto hardware engine inside is shared by all >>> the virtual SPAccs. This is very much for a heterogeneous computing >>> scenario. >> >> Then maybe you have one crypto engine? You ask us to guess all of this, >> also because you do not upstream the DTS for real product. Any >> mentioning of "virtual" already raises concerns... > > PK: Yes this is a single crypto engine, maybe I should have detailed > that in the cover letter. I will fix that. And what I have pushed in So one node, thus no need for this entire virtual device split. > the patch is my complete DTS. It might need updating depending on the If this is complete, then obviously "snps,vspacc-id" is not necessary. Best regards, Krzysztof
On 06/06/2025 14:58, Pavitrakumar Managutte wrote: > On Fri, Jun 6, 2025 at 4:55 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >> >> On 06/06/2025 13:02, Pavitrakumar Managutte wrote: >>> Hi Krzysztof, >>> Appreciate your inputs and feedback. My comments are embedded below. >>> >>> Warm regards, >>> PK >>> >>> On Wed, Jun 4, 2025 at 7:37 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: >>>> >>>> On 04/06/2025 14:20, Pavitrakumar Managutte wrote: >>>>>> >>>>>>>>> + >>>>>>>>> + snps,vspacc-id: >>>>>>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>>>>>> + description: | >>>>>>>>> + Virtual SPAcc instance identifier. >>>>>>>>> + The SPAcc hardware supports multiple virtual instances (determined by >>>>>>>>> + ELP_SPACC_CONFIG_VSPACC_CNT parameter), and this ID is used to identify >>>>>>>>> + which virtual instance this node represents. >>>>>>>> >>>>>>>> No, IDs are not accepted. >>>>>>> >>>>>>> PK: This represents the specific virtual SPAcc that is being used in >>>>>>> the current configuration. It is used to index into the register banks >>>>>>> and the context memories of the virtual SPAcc that is being used. The >>>>>>> SPAcc IP can be configured as dedicated virtual SPAccs in >>>>>>> heterogeneous environments. >>>>>> >>>>>> OK. Why registers are not narrowed to only this instance? It feels like >>>>>> you provide here full register space for multiple devices and then >>>>>> select the bank with above ID. >>>>> >>>>> PK: No, we cant narrow the registers to only this instance since its >>>>> is just a single SPAcc with multiple virtual SPAcc instances. The same >>>>> set of registers(aka register banks) and context memories are >>>>> repeated, but sit at different offset addresses (i*4000 + >>>>> register-offsets). The crypto hardware engine inside is shared by all >>>>> the virtual SPAccs. This is very much for a heterogeneous computing >>>>> scenario. >>>> >>>> Then maybe you have one crypto engine? You ask us to guess all of this, >>>> also because you do not upstream the DTS for real product. Any >>>> mentioning of "virtual" already raises concerns... >>> >>> PK: Yes this is a single crypto engine, maybe I should have detailed >>> that in the cover letter. I will fix that. And what I have pushed in >> >> So one node, thus no need for this entire virtual device split. > > PK: Agreed, its one node for our test case. We do not talk about test case. We talk about this device. > >> >>> the patch is my complete DTS. It might need updating depending on the >> >> If this is complete, then obviously "snps,vspacc-id" is not necessary. > > PK: Yes, its one node, to keep things simple. So we pick a virtual > spacc with its vspacc-id for testing. That way we could test all the > virtual spaccs with a single node, on a need basis. > > On the other hand we could create 'n' nodes for 'n' virtual spaccs and You said it is complete, now you said you have 'n' more. > register 'n' vspacc devices with the crypto subsystem. And bind the > individual nodes with unique vspacc-ids. That might depend on the I don't understand what is "binding" here. Use Linux or DT terminology. > vendor use case, for which we will add incremental support. You did not get the point but you keep saying "yes". This discussion is getting meaningless and you really do not want to listen. You have either incomplete picture here or you have only one node. In both cases virtual ID is not necessary. If you claim virtual ID is necessary, I claim you have here incomplete picture and you are trying to represent one device in multiple nodes. No. Typically one device, one node. NOT one device and 10 virtual nodes representing virtual devices. Amount of ping pongs here is way beyond my patience, so before you respond read that carefully and come with full and accurate hardware description, so we will not have to ping pong trying to get any sort of details. Best regards, Krzysztof
Add the driver for SPAcc(Security Protocol Accelerator), which is a crypto acceleration IP from Synopsys. The SPAcc supports multiple ciphers, hashes and AEAD algorithms with various modes. The driver currently supports below AEAD: - ccm(sm4) - ccm(aes) - gcm(sm4) - gcm(aes) - rfc7539(chacha20,poly1305) cipher: - cbc(sm4) - ecb(sm4) - ctr(sm4) - xts(sm4) - cts(cbc(sm4)) - cbc(aes) - ecb(aes) - xts(aes) - cts(cbc(aes)) - ctr(aes) - chacha20 - ecb(des) - cbc(des) - ecb(des3_ede) - cbc(des3_ede) hash: - cmac(aes) - xcbc(aes) - cmac(sm4) - xcbc(sm4) - hmac(md5) - md5 - hmac(sha1) - sha1 - sha224 - sha256 - sha384 - sha512 - hmac(sha224) - hmac(sha256) - hmac(sha384) - hmac(sha512) - sha3-224 - sha3-256 - sha3-384 - sha3-512 - hmac(sm3) - sm3 - michael_mic Pavitrakumar Managutte (6): dt-bindings: crypto: Document support for SPAcc Add SPAcc Skcipher support Add SPAcc AUTODETECT Support Add SPAcc ahash support Add SPAcc AEAD support Add SPAcc Kconfig and Makefile changelog: v1->v2 changes: - Added local_bh_disable() and local_bh_enable() for the below calls. a. for ciphers skcipher_request_complete() b. for aead aead_request_complete() c. for hash ahash_request_complete() - dt-bindings updates a. removed snps,vspacc-priority and made it into config option b. renamed snps,spacc-wdtimer to snps,spacc-internal-counter c. Added description to all properties - Updated corresponding dt-binding changes to code v2->v3 changes: - cra_init and cra_exit replaced with init_tfm and exit_tfm for hashes. - removed mutex_lock/unlock for spacc_skcipher_fallback call - dt-bindings updates a. updated SOC related information b. renamed compatible string as per SOC. - Updated corresponding dt-binding changes to code .../bindings/crypto/snps,dwc-spacc.yaml | 77 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/dwc-spacc/Kconfig | 103 + drivers/crypto/dwc-spacc/Makefile | 16 + drivers/crypto/dwc-spacc/spacc_aead.c | 1297 +++++++++ drivers/crypto/dwc-spacc/spacc_ahash.c | 969 +++++++ drivers/crypto/dwc-spacc/spacc_core.c | 2464 +++++++++++++++++ drivers/crypto/dwc-spacc/spacc_core.h | 829 ++++++ drivers/crypto/dwc-spacc/spacc_device.c | 309 +++ drivers/crypto/dwc-spacc/spacc_device.h | 231 ++ drivers/crypto/dwc-spacc/spacc_hal.c | 374 +++ drivers/crypto/dwc-spacc/spacc_hal.h | 114 + drivers/crypto/dwc-spacc/spacc_interrupt.c | 324 +++ drivers/crypto/dwc-spacc/spacc_manager.c | 610 ++++ drivers/crypto/dwc-spacc/spacc_skcipher.c | 763 +++++ 16 files changed, 8482 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml create mode 100644 drivers/crypto/dwc-spacc/Kconfig create mode 100644 drivers/crypto/dwc-spacc/Makefile create mode 100755 drivers/crypto/dwc-spacc/spacc_aead.c create mode 100644 drivers/crypto/dwc-spacc/spacc_ahash.c create mode 100644 drivers/crypto/dwc-spacc/spacc_core.c create mode 100644 drivers/crypto/dwc-spacc/spacc_core.h create mode 100644 drivers/crypto/dwc-spacc/spacc_device.c create mode 100644 drivers/crypto/dwc-spacc/spacc_device.h create mode 100644 drivers/crypto/dwc-spacc/spacc_hal.c create mode 100644 drivers/crypto/dwc-spacc/spacc_hal.h create mode 100644 drivers/crypto/dwc-spacc/spacc_interrupt.c create mode 100644 drivers/crypto/dwc-spacc/spacc_manager.c create mode 100644 drivers/crypto/dwc-spacc/spacc_skcipher.c base-commit: 0a84874c7e7dde5cdddc80a82093120e924a348b