From patchwork Thu Jun 5 13:28:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: John Ernberg X-Patchwork-Id: 894303 Received: from mail.actia.se (mail.actia.se [212.181.117.226]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82021226D09; Thu, 5 Jun 2025 13:28:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=212.181.117.226 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749130094; cv=none; b=Ee1qTqkpnhFbNl1nEkncCELEoATXKRo6bHxfpCGllvRUu5flpQoUQG+t25kUCYzGHXwyjUMDoGNjoYpmqu9cDKIGublZdkUhDTIgohSdnWe5wiMgS+0sesfnSLBwSj9+GE+GVMNVTdDxrGNNiBUjoXWYl8uk0zd+lYmf1hYVnwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749130094; c=relaxed/simple; bh=f1andkWVSBI72uYY9GTzzp+Z35hpcWoDV3yz7imaRHA=; h=From:To:CC:Subject:Date:Message-ID:Content-Type:MIME-Version; b=JufPT5Qg4HoCsgwNupp+9TBgjw5+6iMT2WoemME1MlLt0V+hUNtCZPfS+wrd4GZXarS61Smca8CldELUcZKa1ylmkioZlLmT4MS3nmzGcdfKypQlKNUiDe4BoQ2fV+l6U0iO4vogdfUl5gVgeNm0v1cusV6L0Q0yemY3/Ab3kTM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=actia.se; spf=pass smtp.mailfrom=actia.se; arc=none smtp.client-ip=212.181.117.226 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=actia.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=actia.se Received: from S036ANL.actianordic.se (10.12.31.117) by S036ANL.actianordic.se (10.12.31.117) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 5 Jun 2025 15:28:01 +0200 Received: from S036ANL.actianordic.se ([fe80::e13e:1feb:4ea6:ec69]) by S036ANL.actianordic.se ([fe80::e13e:1feb:4ea6:ec69%3]) with mapi id 15.01.2507.039; Thu, 5 Jun 2025 15:28:01 +0200 From: John Ernberg To: =?utf-8?q?Horia_Geant=C4=83?= , Pankaj Gupta , Gaurav Jain , Herbert Xu , "David S . Miller" , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Shawn Guo , Sascha Hauer CC: Frank Li , Pengutronix Kernel Team , Fabio Estevam , "linux-crypto@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "imx@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , John Ernberg Subject: [PATCH v4 0/4] crypto: caam - iMX8QXP support (and related fixes) Thread-Topic: [PATCH v4 0/4] crypto: caam - iMX8QXP support (and related fixes) Thread-Index: AQHb1h2pouM9yuOYnE+5OxMC9E/dlw== Date: Thu, 5 Jun 2025 13:28:01 +0000 Message-ID: <20250605132754.1771368-1-john.ernberg@actia.se> Accept-Language: en-US, sv-SE Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.49.0 x-esetresult: clean, is OK x-esetid: 37303A2955B1445363726A Content-ID: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This series enables the use of the CAAM (Cryptographic Acceleration and Assurance Module) on the iMX8QXP (and its variants). v4: (detailed changelog in each patch) - Declare more compatibles in bindings (Frank Li) - Move job-ring compat check under the job-ring subschema (Rob Herring) v3: https://lore.kernel.org/linux-crypto/20250528144259.2603914-1-john.ernberg@actia.se/T - Fix devicetree CI detected errors (Rob Herring's bot) - Declare the compatibles correctly in bindings (Krzysztof Kozlowski) v2: https://lore.kernel.org/linux-crypto/20250527071552.1424997-1-john.ernberg@actia.se/T - Clarify in the commit message how the crash fix works (Frank Li) - Restrict power-domains only for iMX8Q* SoCs in bindings (Frank Li) - Collect tags v1: https://lore.kernel.org/linux-crypto/20250523131814.1047662-1-john.ernberg@actia.se/T Horia Geantă (1): arm64: dts: freescale: imx8qxp/imx8qm: Add CAAM support John Ernberg (3): crypto: caam - Prevent crash on suspend with iMX8QM / iMX8ULP crypto: caam - Support iMX8QXP and variants thereof dt-bindings: crypto: fsl,sec-v4.0: Add power domains for iMX8QM and iMX8QXP .../bindings/crypto/fsl,sec-v4.0.yaml | 41 ++++++++++++++++++- .../boot/dts/freescale/imx8-ss-security.dtsi | 38 +++++++++++++++++ arch/arm64/boot/dts/freescale/imx8qm.dtsi | 1 + .../dts/freescale/imx8qxp-ss-security.dtsi | 16 ++++++++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 + drivers/crypto/caam/ctrl.c | 7 ++-- drivers/crypto/caam/intern.h | 1 + 7 files changed, 102 insertions(+), 4 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi Reviewed-by: Rob Herring (Arm)