From patchwork Mon May 8 11:52:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 679972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4BE0C77B7F for ; Mon, 8 May 2023 11:56:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236373AbjEHL4O (ORCPT ); Mon, 8 May 2023 07:56:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236564AbjEHLzN (ORCPT ); Mon, 8 May 2023 07:55:13 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2C6CA5E4 for ; Mon, 8 May 2023 04:54:28 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-1aaef97652fso29739355ad.0 for ; Mon, 08 May 2023 04:54:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1683546867; x=1686138867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xPSUnhfUj53RcidJeP5kL6gGwZHEmDmCHUal6KZm638=; b=B89bgCvRmGEMAUxP/QGsfNQm2gjwxDg+QrprfVD8J+SUcbDL0JuefH8yg3QbKPSusP 8rH/5FTe8ecRIqNzZRrZVua1E97KFmKTWvsf05A6XAiAhMWHWulc88M5zsYV9fPB6BS/ MG1FdVheDOnn8ZrtyfRM2iqXy2fuTrATFp+FIVtPvWglUNAhf60NlY4E0EgKpwIVymAG 22Z/iJxvTrTLUL6IMkcXxeYFv6Sm+2OuG3qF25Rr4SJJxf68+Ai+1zi6h4/KC4tNa7G2 WrEHfPZyxjuUyQJiZAjQ56tNOS0EUPhcyh8ipbTdoOLoQSzzpNN6x9F1W2Hpj6hP3F0Z eKaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683546867; x=1686138867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xPSUnhfUj53RcidJeP5kL6gGwZHEmDmCHUal6KZm638=; b=IMf7k45oPBj1ppTL+qIM64zPr4a3Xx1P3SPDu4Mxmcf5IByPMlE5AjEEXwqhHiHhhi 2A7+ENOGcD+y9Cf6tnpLbzwxVDqn8ACtM0wjtdM4e8vV2BbozY2fQA2WjOeTpa+Ot9oH itE5R0s3bFfny/qMNU7A/O4IbdThND9wA1AjrY4V9cZyIuYs9fvZfTyfaBSaECOKLsYC mBhf8U20XQpTF7YqrpowWEH4z37WE2+dVP0Kvg0xygcHU5HB4bAKTdEXgIziNdDhOv5A X4hWLYTNXreRBElaxHnQ9+Cco87iyqxDNQVblUkp32AgkRCUX2tjrymtGpjDQI9uzrpA RE3g== X-Gm-Message-State: AC+VfDyynnIgSntVsTx7zIwm90uX8oq3pK094mb5g3+ihywTcvQ1SzYp SoZUn6FXQdrb0hIYf9sw9od22VVGNBJwZfaJmNo= X-Google-Smtp-Source: ACHHUZ6Gz6YRt/rRbsWfX8rM4EyT+3FO881Otsm/ltvRREx1WVjAZpVesBHDJ+4NomT8Orb6vkyrsA== X-Received: by 2002:a17:902:f547:b0:1ab:bfb:4b6e with SMTP id h7-20020a170902f54700b001ab0bfb4b6emr13666475plf.31.1683546866800; Mon, 08 May 2023 04:54:26 -0700 (PDT) Received: from sunil-laptop.. ([106.51.189.144]) by smtp.gmail.com with ESMTPSA id w9-20020a170902904900b001aaed524541sm7015149plz.227.2023.05.08.04.54.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 May 2023 04:54:26 -0700 (PDT) From: Sunil V L To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-crypto@vger.kernel.org, platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev Cc: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Daniel Lezcano , Thomas Gleixner , Weili Qian , Zhou Wang , Herbert Xu , "David S . Miller" , Marc Zyngier , Maximilian Luz , Hans de Goede , Mark Gross , Nathan Chancellor , Nick Desaulniers , Tom Rix , Sunil V L , "Rafael J . Wysocki" , Conor Dooley , Andrew Jones Subject: [PATCH V5 11/21] RISC-V: smpboot: Add ACPI support in setup_smp() Date: Mon, 8 May 2023 17:22:27 +0530 Message-Id: <20230508115237.216337-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230508115237.216337-1-sunilvl@ventanamicro.com> References: <20230508115237.216337-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Enable SMP boot on ACPI based platforms by using the RINTC structures in the MADT table. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Conor Dooley Reviewed-by: Andrew Jones --- arch/riscv/include/asm/acpi.h | 2 + arch/riscv/kernel/smpboot.c | 72 ++++++++++++++++++++++++++++++++++- 2 files changed, 73 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 39471759bec1..f71ce21ff684 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -64,6 +64,8 @@ struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu); u32 get_acpi_id_for_cpu(int cpu); int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa); + +static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } #else static inline void acpi_init_rintc_map(void) { } static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index a2e66126b733..67bc5ef3e8b2 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -8,6 +8,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -70,6 +71,72 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } +#ifdef CONFIG_ACPI +static unsigned int cpu_count = 1; + +static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end) +{ + unsigned long hart; + static bool found_boot_cpu; + struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header; + + /* + * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED + * bit in the flag is not enabled, it means OS should not try to enable + * the cpu to which RINTC belongs. + */ + if (!(processor->flags & ACPI_MADT_ENABLED)) + return 0; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + acpi_table_print_madt_entry(&header->common); + + hart = processor->hart_id; + if (hart == INVALID_HARTID) { + pr_warn("Invalid hartid\n"); + return 0; + } + + if (hart == cpuid_to_hartid_map(0)) { + BUG_ON(found_boot_cpu); + found_boot_cpu = true; + early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); + return 0; + } + + if (cpu_count >= NR_CPUS) { + pr_warn("NR_CPUS is too small for the number of ACPI tables.\n"); + return 0; + } + + cpuid_to_hartid_map(cpu_count) = hart; + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); + cpu_count++; + + return 0; +} + +static void __init acpi_parse_and_init_cpus(void) +{ + int cpuid; + + cpu_set_ops(0); + + acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0); + + for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { + if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { + cpu_set_ops(cpuid); + set_cpu_possible(cpuid, true); + } + } +} +#else +#define acpi_parse_and_init_cpus(...) do { } while (0) +#endif + static void __init of_parse_and_init_cpus(void) { struct device_node *dn; @@ -118,7 +185,10 @@ static void __init of_parse_and_init_cpus(void) void __init setup_smp(void) { - of_parse_and_init_cpus(); + if (acpi_disabled) + of_parse_and_init_cpus(); + else + acpi_parse_and_init_cpus(); } static int start_secondary_cpu(int cpu, struct task_struct *tidle)