| Message ID | 20250529113116.669667-2-h.jain@amd.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Versal TRNG driver | expand |
On Thu, May 29, 2025 at 05:01:14PM +0530, Harsh Jain wrote: > Add TRNG node compatible string and reg properities. > > Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> > Signed-off-by: Harsh Jain <h.jain@amd.com> The signoff chain here looks wrong, since there's no From: field in the patch, meaning that you are the author and submitter, but the order of signoffs suggests that Mounika is the author. If you are in fact the author and submitter, what was their role? > --- > .../bindings/crypto/xlnx,versal-trng.yaml | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > new file mode 100644 > index 000000000000..547ed91aa873 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml > @@ -0,0 +1,36 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/xlnx,versal-trng.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx Versal True Random Number Generator Hardware Accelerator > + > +maintainers: > + - Harsh Jain <h.jain@amd.com> > + - Mounika Botcha <mounika.botcha@amd.com> > + > +description: > + The Versal True Random Number Generator cryptographic accelerator > + is used to generate the random number. I would be surprised if the random number generator did not generate random numbers. I think you can probably just drop the description entirely in the future > + > +properties: > + compatible: > + const: xlnx,versal-trng > + > + reg: > + maxItems: 1 > + > +required: > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + trng@f1230000 { "rng" I think is the standard node name here, since you need to respin to fix the signoff chain. > + compatible = "xlnx,versal-trng"; > + reg = <0xf1230000 0x1000>; > + }; > +... > + > -- > 2.34.1 > >
diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml new file mode 100644 index 000000000000..547ed91aa873 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,versal-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal True Random Number Generator Hardware Accelerator + +maintainers: + - Harsh Jain <h.jain@amd.com> + - Mounika Botcha <mounika.botcha@amd.com> + +description: + The Versal True Random Number Generator cryptographic accelerator + is used to generate the random number. + +properties: + compatible: + const: xlnx,versal-trng + + reg: + maxItems: 1 + +required: + - reg + +additionalProperties: false + +examples: + - | + trng@f1230000 { + compatible = "xlnx,versal-trng"; + reg = <0xf1230000 0x1000>; + }; +... +