| Message ID | 20250612052542.2591773-2-h.jain@amd.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Versal TRNG driver | expand |
On Thu, Jun 12, 2025 at 10:55:40AM GMT, Harsh Jain wrote: > From: Mounika Botcha <mounika.botcha@amd.com> > > Add TRNG node compatible string and reg properities. > > Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> > Signed-off-by: Harsh Jain <h.jain@amd.com> > --- > .../bindings/crypto/xlnx,versal-trng.yaml | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml new file mode 100644 index 000000000000..180adb96e5e7 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,versal-trng.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,versal-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal True Random Number Generator Hardware Accelerator + +maintainers: + - Harsh Jain <h.jain@amd.com> + - Mounika Botcha <mounika.botcha@amd.com> + +description: + The Versal True Random Number Generator consists of Ring Oscillators as + entropy source and a deterministic CTR_DRBG random bit generator (DRBG). + +properties: + compatible: + const: xlnx,versal-trng + + reg: + maxItems: 1 + +required: + - reg + +additionalProperties: false + +examples: + - | + rng@f1230000 { + compatible = "xlnx,versal-trng"; + reg = <0xf1230000 0x1000>; + }; +... +