From patchwork Sun Jun 23 03:33:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 806912 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0992F179AB; Sun, 23 Jun 2024 03:33:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719113609; cv=none; b=rnHV4BoyNQA9C6SF7/7TVEqSdOqlvrVnTFMlS5Kw50K7jxxXB2at7dGyrIL93MnlQGkgibBrpjzRAX47kzaFhSzHWdi3Ib7pxJLCjdOZ0jBDE+ZWrqiWrEcBR6QntLRu1e8eJZfhlhqnlPOHULDDDcGNBRwpgvLW/+u0oWbJ2O8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719113609; c=relaxed/simple; bh=WVsptMgVWgtma+rYDCK7P6OmRzlXNG+SJmOmY1hNk+M=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=LoM/kPjM8jM0aQFppbuGxD00VOwdxjPnEugIG+uBN+It1JfqM+yufvdgTf4lekJLuM+FN5fQR50oE4UBXy+d5XTsT+Zb3CMl+xmLixmMOInn2MY0gGO0RBchl97AwYdAvCnu2RR9mpbSLCw0R8tm7v0p90PSRbesk9VwJUa/GxU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.97.1) (envelope-from ) id 1sLDyf-000000006cH-0m9y; Sun, 23 Jun 2024 03:33:17 +0000 Date: Sun, 23 Jun 2024 04:33:13 +0100 From: Daniel Golle To: Daniel Golle , Aurelien Jarno , Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel , Uwe =?iso-8859-1?q?Kleine-K=F6nig?= , Sebastian Reichel , Sascha Hauer , Dragan Simic , Martin Kaiser , Ard Biesheuvel , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x Message-ID: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: From: Aurelien Jarno Enable the just added Rockchip RNG driver for RK356x SoCs. Signed-off-by: Aurelien Jarno Signed-off-by: Daniel Golle --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d8543b5557ee..d43d59b44ea5 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1112,6 +1112,15 @@ sdhci: mmc@fe310000 { status = "disabled"; }; + rng: rng@fe388000 { + compatible = "rockchip,rk3568-rng"; + reg = <0x0 0xfe388000 0x0 0x4000>; + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; + clock-names = "core", "ahb"; + resets = <&cru SRST_TRNG_NS>; + reset-names = "reset"; + }; + i2s0_8ch: i2s@fe400000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe400000 0x0 0x1000>;