From patchwork Mon Oct 30 15:15:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 117488 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2709075qgn; Mon, 30 Oct 2017 08:16:31 -0700 (PDT) X-Google-Smtp-Source: ABhQp+T4lZuBTiZIFenjbyaHV4fr+VVqqL3Croec+xNlGwx2BlZw+CbY9+mU9cXr9pGAwXFSAnuP X-Received: by 10.84.235.69 with SMTP id g5mr7827818plt.239.1509376591440; Mon, 30 Oct 2017 08:16:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509376591; cv=none; d=google.com; s=arc-20160816; b=O6ntO1N0r4HLoDCmJ6HSU6bTqCmWL0xVkSNGbLPqMPbm8rRACZB/84VYiqqnwxARsz 128YXGLhmnle2ygaSvU7mxRdISO5f2XtMlK5V2pd+u5w4YmMWngb78bVGSb/EyXGYgJ6 Heeri7DhOn/eU56hsP6yqHEJlgDUIkrdCvTsna9mYzEAi5L0hQLoarW5/InghEGdZLOe xIsb7whs27cn47g446yMvM9ADJT9ydJ5CyC+krOF4rJhLU+oIoYqtbKtmVfJGqQ2W9Aw WtfYavQBcu0wpaHYVU2dR7EWjBx+sBqeIrBNnKMmI2PeoflTS+NbLt2VPLigZaQ9o+aF gI8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dmarc-filter:arc-authentication-results; bh=jYC0aa5EISlNj7tybO02dNHXFMzU/Y45lH/vHy3ye2k=; b=muvHqlIeBCEzbzFZ+N0+GaqbgzlIoZHMx113Br8kHuBd8aK5lqjE0D5rLzDcFKu7z5 GES2dFLzyCDsXMbitsIE791EZXG5rhwtpN7B9iFO1tRXU6KSq7Q4tyVFUATRL1kd53QX eyR29bnG+RcU9GcdadsjcaD0QGvrSHjY8Gz4j4zWQKqA9daGsybBiK1ifNjOxMpWTofP SAYvEOn1qseF0GHRnB3XUwMtpJHOC0Poc1njkJRVaXCxDGYOqhnUNZ4of89GP4jbL7D7 rezzSDNuT9I4RGuVc3TjdKsQz4va3MDJfj8Y6kBezNDfd7sadvH+9P3uQeTvNTv9vdQw TjaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p14si9569432pli.301.2017.10.30.08.16.30; Mon, 30 Oct 2017 08:16:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752532AbdJ3PQa (ORCPT + 6 others); Mon, 30 Oct 2017 11:16:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:39892 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751663AbdJ3PQ3 (ORCPT ); Mon, 30 Oct 2017 11:16:29 -0400 Received: from localhost.localdomain (unknown [104.237.91.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 942382192A; Mon, 30 Oct 2017 15:16:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 942382192A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=shawnguo@kernel.org From: Shawn Guo To: Kishon Vijay Abraham I Cc: Rob Herring , Jianguo Sun , Jiancheng Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shawn Guo Subject: [PATCH v5 0/3] Add Combo PHY driver for HiSilicon STB SoCs Date: Mon, 30 Oct 2017 23:15:54 +0800 Message-Id: <1509376557-7187-1-git-send-email-shawnguo@kernel.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Shawn Guo It adds device tree bindings and driver support for Combo PHY device which can be found on HiSilicon STB SoCs. Changes for v5: - Add bindings doc for Hi3798CV200 peripheral controller, and refer to the bindings of this parent node in combphy bindings doc. Changes for v4: - Instead of relying on device id, add a new property hisilicon,fixed-mode for combphy device that doesn't support mode select but a fixed phy mode. - Move combphy mode select register bits definition to device tree, as it may vary from one device to another. Changes for v3: - Make combphy device be child of peripheral controller and use 'reg' property for mapping combphy configuration registers. - Kill "hisilicon,peripheral-syscon" property, since parent node is just the syscon controller now. - Check combphy id to handle the quirk that combphy0 can not configure mode but always works in USB3 mode. - Unify phy .init and .exit hooks for different combphy instances and work modes, as the only quirk we need to handle is that combphy0 can only work in USB3 mode. - Better naming for clock and reset, 'ref' to 'ref_clk', 'por' to 'por_rst'. Changes for v2: - Move DT bindings into a separate patch. - Drop the spurious newline from drivers/phy/Makefile. - Use the phy type defines in dt-bindings/phy/phy.h. - Use PTR_ERR_OR_ZERO() for checking return from devm_of_phy_provider_register(). - Add USB3 phy support. Jianguo Sun (2): dt-bindings: add bindings doc for hi3798cv200 combphy phy: add combo phy driver for HiSilicon STB SoCs Shawn Guo (1): dt-bindings: hisilicon: add doc for Hi3798CV200 peripheral controller .../bindings/arm/hisilicon/hisilicon.txt | 23 ++ .../bindings/phy/phy-hi3798cv200-combphy.txt | 59 +++++ drivers/phy/hisilicon/Kconfig | 9 + drivers/phy/hisilicon/Makefile | 1 + drivers/phy/hisilicon/phy-histb-combphy.c | 289 +++++++++++++++++++++ 5 files changed, 381 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3798cv200-combphy.txt create mode 100644 drivers/phy/hisilicon/phy-histb-combphy.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html