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[v2,0/4] phy: socionext: add new UniPhier USB PHY driver support

Message ID 1533290045-18969-1-git-send-email-hayashi.kunihiko@socionext.com
Headers show
Series phy: socionext: add new UniPhier USB PHY driver support | expand

Message

Kunihiko Hayashi Aug. 3, 2018, 9:54 a.m. UTC
This series adds support for PHY interface built into USB controller
implemented in Socionext UniPhier SoCs.

The USB3 PHY driver supports High-Speed PHY and Super-Speed PHY included in
the USB3 glue layer, and the USB2 PHY driver supports High-Speed PHY
integrated into system controller.

Kunihiko Hayashi (4):
  dt-bindings: phy: add DT bindings for UniPhier USB3 PHY driver
  phy: socionext: add USB3 PHY driver for UniPhier SoC
  dt-bindings: phy: add DT bindings for UniPhier USB2 PHY driver
  phy: socionext: add USB2 PHY driver for UniPhier SoC

Changes since v1:
- rewrite a header with C++ comment style
- dt-bindings: separate a document for ssphy and hsphy
- dt-bindings: sort clock-names and reset-names to begin with "phy"
- dt-bindings: use vbus-supply instead of phy-supply, because vbus isn't
  for phy, but vbus is tied to the port that corresponds to each phy [1]
- stop using phy_power and add own .power_on and .power_off functions
  to control clk/reset for phy and vbus regulator
- separate clk_get() and reset_control_get() for each clk/reset
  and remove arrays of clock_names and reset_names
- remove phy-parameters that are the same as power-on values
- remove functions to set phy-parameters for legacy SoCs
- express phy-parameters by using macros including the number of
  the register and its bitfield (msb and lsb)

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-July/593279.html

 .../devicetree/bindings/phy/uniphier-usb2-phy.txt  |  45 +++
 .../bindings/phy/uniphier-usb3-hsphy.txt           |  69 ++++
 .../bindings/phy/uniphier-usb3-ssphy.txt           |  57 +++
 drivers/phy/Kconfig                                |   1 +
 drivers/phy/Makefile                               |   1 +
 drivers/phy/socionext/Kconfig                      |  25 ++
 drivers/phy/socionext/Makefile                     |   7 +
 drivers/phy/socionext/phy-uniphier-usb2.c          | 246 ++++++++++++
 drivers/phy/socionext/phy-uniphier-usb3hs.c        | 423 +++++++++++++++++++++
 drivers/phy/socionext/phy-uniphier-usb3ss.c        | 350 +++++++++++++++++
 10 files changed, 1224 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt
 create mode 100644 Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt
 create mode 100644 Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt
 create mode 100644 drivers/phy/socionext/Kconfig
 create mode 100644 drivers/phy/socionext/Makefile
 create mode 100644 drivers/phy/socionext/phy-uniphier-usb2.c
 create mode 100644 drivers/phy/socionext/phy-uniphier-usb3hs.c
 create mode 100644 drivers/phy/socionext/phy-uniphier-usb3ss.c

-- 
2.7.4

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Comments

Kunihiko Hayashi Aug. 8, 2018, 12:41 a.m. UTC | #1
On Fri, 3 Aug 2018 18:54:03 +0900 <hayashi.kunihiko@socionext.com> wrote:

> Add a driver for PHY interface built into USB3 controller

> implemented in UniPhier SoCs.

> This driver supports High-Speed PHY and Super-Speed PHY.

> 

> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> Signed-off-by: Motoya Tanigawa <tanigawa.motoya@socionext.com>

> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>

> ---

>  drivers/phy/Kconfig                         |   1 +

>  drivers/phy/Makefile                        |   1 +

>  drivers/phy/socionext/Kconfig               |  12 +

>  drivers/phy/socionext/Makefile              |   6 +

>  drivers/phy/socionext/phy-uniphier-usb3hs.c | 423 ++++++++++++++++++++++++++++

>  drivers/phy/socionext/phy-uniphier-usb3ss.c | 350 +++++++++++++++++++++++

>  6 files changed, 793 insertions(+)

>  create mode 100644 drivers/phy/socionext/Kconfig

>  create mode 100644 drivers/phy/socionext/Makefile

>  create mode 100644 drivers/phy/socionext/phy-uniphier-usb3hs.c

>  create mode 100644 drivers/phy/socionext/phy-uniphier-usb3ss.c


[snip]

> +static void uniphier_u3ssphy_testio_write(struct uniphier_u3ssphy_priv *priv,

> +					  u32 data)

> +{

> +	/* need to read TESTO twice after accessing TESTI */

> +	writel(data, priv->base + SSPHY_TESTI);

> +	readl(priv->base + SSPHY_TESTI);

> +	readl(priv->base + SSPHY_TESTI);


I made a mistake here. The comment and the code are inconsistent.
I'll fix it next.

Thanks,

---
Best Regards,
Kunihiko Hayashi


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