From patchwork Tue Mar 17 09:41:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 203217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1327DC2BB1D for ; Tue, 17 Mar 2020 09:41:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E243B2076E for ; Tue, 17 Mar 2020 09:41:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726669AbgCQJlm (ORCPT ); Tue, 17 Mar 2020 05:41:42 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:48689 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727285AbgCQJlY (ORCPT ); Tue, 17 Mar 2020 05:41:24 -0400 Received: from dude02.hi.pengutronix.de ([2001:67c:670:100:1d::28] helo=dude02.lab.pengutronix.de) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jE8ix-0004Q5-2M; Tue, 17 Mar 2020 10:41:23 +0100 Received: from mtr by dude02.lab.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1jE8iw-00049I-DO; Tue, 17 Mar 2020 10:41:22 +0100 From: Michael Tretter To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: Michal Simek , Rob Herring , Dhaval Shah , kernel@pengutronix.de, Michael Tretter Subject: [PATCH 0/6] soc: xilinx: vcu: provide interfaces for other drivers Date: Tue, 17 Mar 2020 10:41:09 +0100 Message-Id: <20200317094115.15896-1-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::28 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, The Xilinx VCU is glue for integrating the Allegro DVT codec into the ZynqMP PL infrastructure. This glue is responsible for generating the clocks for the actual codec and provides registers for reading the codec configuration. Other drivers, e.g. the allegro-dvt driver, need to interact or at least read information from the xlnx_vcu driver. Therefore, the xlnx_vcu driver should provide its clocks for other drivers and register the generated clocks in the clock tree. This allows other drivers to simply get the clock rate via the usual interface. It is not so simple for the second register bank (called "logicoreip" in the original binding), because there are various registers for the encoder, the decoder and common stuff (see PG252, H.264/H.265 Video Codec Unit v1.2, p. 14). Therefore, I decided to extract a separate binding for this register bank, call it "xlnx,vcu-settings" and use a syscon interface that can be used by the xlnx_vcu driver and other drivers that need this information. I'm not too happy with this solution, but I couldn't come up with a better solution without inventing a new interface, which I really don't want to do for that use case. I kept the behavior of the xlnx_vcu driver backwards compatible, to avoid breaking systems that use device trees with the xlnx,vcu device tree node as generated by Vivado, but to be able to use the register bank from other drivers, you must use the new binding. Michael Michael Tretter (6): soc: xilinx: vcu: drop useless success message ARM: dts: define indexes for output clocks soc: xilinx: vcu: implement clock provider for output clocks dt-bindings: soc: xlnx: extract xlnx,vcu-settings to separate binding soc: xilinx: vcu: use vcu-settings syscon registers soc: xilinx: vcu: add missing register NUM_CORE .../soc/xilinx/xlnx,vcu-settings.yaml | 45 +++++ .../bindings/soc/xilinx/xlnx,vcu.txt | 9 +- drivers/soc/xilinx/Kconfig | 3 +- drivers/soc/xilinx/xlnx_vcu.c | 163 ++++++++++++------ include/dt-bindings/clock/xlnx-vcu.h | 15 ++ include/linux/mfd/syscon/xlnx-vcu.h | 39 +++++ 6 files changed, 216 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml create mode 100644 include/dt-bindings/clock/xlnx-vcu.h create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h