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[92.233.226.227]) by smtp.gmail.com with ESMTPSA id f4sm2363094wrq.54.2020.11.05.04.04.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 04:04:18 -0800 (PST) From: Srinivas Kandagatla To: linus.walleij@linaro.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 0/2] pinctrl: qcom: Add sm8250 lpass lpi pinctrl support Date: Thu, 5 Nov 2020 12:04:08 +0000 Message-Id: <20201105120410.18305-1-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds support for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SM8250. This patch has been tested on support to Qualcomm Robotics RB5 Development Kit based on QRB5165 Robotics SoC. This board has 2 WSA881X smart speakers with onboard DMIC connected to internal LPASS codec via WSA and VA macros respectively. Most of the work is derived from downstream Qualcomm kernels. Credits to various Qualcomm authors from Patrick Lai's team who have contributed to this code. Changes since v1: - updated bindings to use '-pins$' instead of wild card matching as suggested by Rob. Srinivas Kandagatla (2): pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings .../pinctrl/qcom,lpass-lpi-pinctrl.yaml | 129 +++ drivers/pinctrl/qcom/Kconfig | 8 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 781 ++++++++++++++++++ 4 files changed, 919 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c