Message ID | 20210330230445.26619-1-digetx@gmail.com |
---|---|
Headers | show |
Series | NVIDIA Tegra memory improvements | expand |
On Wed, 31 Mar 2021 02:04:39 +0300, Dmitry Osipenko wrote: > This series replaces the raw voltage regulator with a power domain that > will be managing SoC core voltage. The core power domain patches are still > under review, but it's clear at this point that this is the way we will > implement the DVFS support. > > The remaining Tegra20 memory bindings are converted to schema. I also > made a small improvement to the memory drivers. > > [...] Applied, thanks! [1/6] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain commit: d46cf7106c4979117e108336dfadcaf57d23f9ed [2/6] dt-bindings: memory: tegra30: emc: Replace core regulator with power domain commit: c19137a97e39a9cdf24c9feb580af4564997c1f9 [3/6] dt-bindings: memory: tegra124: emc: Replace core regulator with power domain commit: 749d01cd0b796adb69d68e9079520f4f95b17cd2 [6/6] memory: tegra: Print out info-level once per driver probe commit: 06949d1d9accbc7d3a029536650162bbca30151b Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
On Wed, 31 Mar 2021 02:04:39 +0300, Dmitry Osipenko wrote: > This series replaces the raw voltage regulator with a power domain that > will be managing SoC core voltage. The core power domain patches are still > under review, but it's clear at this point that this is the way we will > implement the DVFS support. > > The remaining Tegra20 memory bindings are converted to schema. I also > made a small improvement to the memory drivers. > > [...] Applied, thanks! [4/6] dt-bindings: memory: tegra20: mc: Convert to schema commit: 6553fa57cb1707396ad3a27dc78fa61e1750ab31 Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
On 31/03/2021 01:04, Dmitry Osipenko wrote: > Hi, > > This series replaces the raw voltage regulator with a power domain that > will be managing SoC core voltage. The core power domain patches are still > under review, but it's clear at this point that this is the way we will > implement the DVFS support. > > The remaining Tegra20 memory bindings are converted to schema. I also > made a small improvement to the memory drivers. > > Changelog: > > v2: - Fixed typos in the converted schemas. > - Corrected reg entry of tegra20-mc-gart schema to use fixed number of items. > - Made power-domain to use maxItems instead of $ref phandle in schemas. > > Dmitry Osipenko (6): > dt-bindings: memory: tegra20: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra30: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra124: emc: Replace core regulator with power > domain > dt-bindings: memory: tegra20: mc: Convert to schema > dt-bindings: memory: tegra20: emc: Convert to schema > memory: tegra: Print out info-level once per driver probe Thanks, applied subset - 1-4 and 6. For patch 5/6 I expect v3. Best regards, Krzysztof > > .../nvidia,tegra124-emc.yaml | 7 +- > .../memory-controllers/nvidia,tegra20-emc.txt | 130 -------- > .../nvidia,tegra20-emc.yaml | 294 ++++++++++++++++++ > .../memory-controllers/nvidia,tegra20-mc.txt | 40 --- > .../memory-controllers/nvidia,tegra20-mc.yaml | 79 +++++ > .../nvidia,tegra30-emc.yaml | 7 +- > drivers/memory/tegra/tegra124-emc.c | 12 +- > drivers/memory/tegra/tegra20-emc.c | 20 +- > drivers/memory/tegra/tegra30-emc.c | 18 +- > 9 files changed, 406 insertions(+), 201 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml > Best regards, Krzysztof
01.04.2021 20:54, Krzysztof Kozlowski пишет: > On 31/03/2021 01:04, Dmitry Osipenko wrote: >> Hi, >> >> This series replaces the raw voltage regulator with a power domain that >> will be managing SoC core voltage. The core power domain patches are still >> under review, but it's clear at this point that this is the way we will >> implement the DVFS support. >> >> The remaining Tegra20 memory bindings are converted to schema. I also >> made a small improvement to the memory drivers. >> >> Changelog: >> >> v2: - Fixed typos in the converted schemas. >> - Corrected reg entry of tegra20-mc-gart schema to use fixed number of items. >> - Made power-domain to use maxItems instead of $ref phandle in schemas. >> >> Dmitry Osipenko (6): >> dt-bindings: memory: tegra20: emc: Replace core regulator with power >> domain >> dt-bindings: memory: tegra30: emc: Replace core regulator with power >> domain >> dt-bindings: memory: tegra124: emc: Replace core regulator with power >> domain >> dt-bindings: memory: tegra20: mc: Convert to schema >> dt-bindings: memory: tegra20: emc: Convert to schema >> memory: tegra: Print out info-level once per driver probe > > Thanks, applied subset - 1-4 and 6. For patch 5/6 I expect v3. I'll make a v3, thank you.