| Message ID | 20210505213731.538612-1-bhupesh.sharma@linaro.org |
|---|---|
| Headers | show |
| Series | Enable Qualcomm Crypto Engine on sm8250 | expand |
Hello Eric, On Thu, 6 May 2021 at 03:39, Eric Biggers <ebiggers@kernel.org> wrote: > > On Thu, May 06, 2021 at 03:07:14AM +0530, Bhupesh Sharma wrote: > > > > Tested the enabled crypto algorithms with cryptsetup test utilities > > on sm8250-mtp and RB5 board (see [1]). > > > > Does this driver also pass the crypto self-tests, including the fuzz tests > (CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y)? I did try running these self-tests and they pass with 'CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y' as well. Do note that we need the AEAD fixes from Thara (see[1]) for all of the fuzz tests to work (so my patches are actually rebased on this series). [1]. https://lore.kernel.org/linux-crypto/20210429150707.3168383-5-thara.gopinath@linaro.org/T/ Thanks, Bhupesh
On Thu, May 06, 2021 at 03:07:14AM +0530, Bhupesh Sharma wrote: > Changes since v1: > ================= > - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ > - v1 did not work well as reported earlier by Dmitry, so v2 contains the following > changes/fixes: > ~ Enable the interconnect path b/w BAM DMA and main memory first > before trying to access the BAM DMA registers. > ~ Enable the interconnect path b/w qce crytpo and main memory first > before trying to access the qce crypto registers. > ~ Make sure to document the required and optional properties for both > BAM DMA and qce crypto drivers. > ~ Add a few debug related print messages in case the qce crypto driver > passes or fails to probe. > ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA > or the interconnect driver(s) (needed on specific Qualcomm parts) are not > yet probed. > > Qualcomm crypto engine is also available on sm8250 SoC. > It supports hardware accelerated algorithms for encryption > and authentication. It also provides support for aes, des, 3des > encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) > authentication algorithms. > > Tested the enabled crypto algorithms with cryptsetup test utilities > on sm8250-mtp and RB5 board (see [1]). > > While at it, also make a minor fix in 'sdm845.dtsi', to make > sure it confirms with the other .dtsi files which expose > crypto nodes on qcom SoCs. > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Andy Gross <agross@kernel.org> > Cc: Herbert Xu <herbert@gondor.apana.org.au> > Cc: David S. Miller <davem@davemloft.net> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Vinod Koul <vkoul@kernel.org> > Cc: dmaengine@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: bhupesh.linux@gmail.com > > Bhupesh Sharma (14): > dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to > optional properties > dt-bindings: qcom-bam: Add 'iommus' to required properties > dt-bindings: qcom-qce: Add 'iommus' to required properties > dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to > optional properties > arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly > dt-bindings: crypto : Add new compatible strings for qcom-qce Please convert these bindings to schemas. > arm64/dts: qcom: Use new compatibles for crypto nodes > crypto: qce: Add new compatibles for qce crypto driver > crypto: qce: Print a failure msg in case probe() fails > crypto: qce: Convert the device found dev_dbg() to dev_info() > dma: qcom: bam_dma: Create a new header file for BAM DMA driver > crypto: qce: Defer probing if BAM dma is not yet initialized > crypto: qce: Defer probe in case interconnect is not yet initialized > arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. > > Thara Gopinath (3): > dma: qcom: bam_dma: Add support to initialize interconnect path > crypto: qce: core: Add support to initialize interconnect path > crypto: qce: core: Make clocks optional > > .../devicetree/bindings/crypto/qcom-qce.txt | 22 +- > .../devicetree/bindings/dma/qcom_bam_dma.txt | 5 + > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++ > drivers/crypto/qce/core.c | 112 +++++-- > drivers/crypto/qce/core.h | 3 + > drivers/dma/qcom/bam_dma.c | 306 ++---------------- > include/soc/qcom/bam_dma.h | 290 +++++++++++++++++ > 9 files changed, 457 insertions(+), 317 deletions(-) > create mode 100644 include/soc/qcom/bam_dma.h > > -- > 2.30.2 >
Hi Rob, On Sat, 8 May 2021 at 02:44, Rob Herring <robh@kernel.org> wrote: > > On Thu, May 06, 2021 at 03:07:14AM +0530, Bhupesh Sharma wrote: > > Changes since v1: > > ================= > > - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ > > - v1 did not work well as reported earlier by Dmitry, so v2 contains the following > > changes/fixes: > > ~ Enable the interconnect path b/w BAM DMA and main memory first > > before trying to access the BAM DMA registers. > > ~ Enable the interconnect path b/w qce crytpo and main memory first > > before trying to access the qce crypto registers. > > ~ Make sure to document the required and optional properties for both > > BAM DMA and qce crypto drivers. > > ~ Add a few debug related print messages in case the qce crypto driver > > passes or fails to probe. > > ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA > > or the interconnect driver(s) (needed on specific Qualcomm parts) are not > > yet probed. > > > > Qualcomm crypto engine is also available on sm8250 SoC. > > It supports hardware accelerated algorithms for encryption > > and authentication. It also provides support for aes, des, 3des > > encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) > > authentication algorithms. > > > > Tested the enabled crypto algorithms with cryptsetup test utilities > > on sm8250-mtp and RB5 board (see [1]). > > > > While at it, also make a minor fix in 'sdm845.dtsi', to make > > sure it confirms with the other .dtsi files which expose > > crypto nodes on qcom SoCs. > > > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Andy Gross <agross@kernel.org> > > Cc: Herbert Xu <herbert@gondor.apana.org.au> > > Cc: David S. Miller <davem@davemloft.net> > > Cc: Stephen Boyd <sboyd@kernel.org> > > Cc: Michael Turquette <mturquette@baylibre.com> > > Cc: Vinod Koul <vkoul@kernel.org> > > Cc: dmaengine@vger.kernel.org > > Cc: linux-clk@vger.kernel.org > > Cc: linux-crypto@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > Cc: bhupesh.linux@gmail.com > > > > Bhupesh Sharma (14): > > dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to > > optional properties > > dt-bindings: qcom-bam: Add 'iommus' to required properties > > dt-bindings: qcom-qce: Add 'iommus' to required properties > > dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to > > optional properties > > arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly > > dt-bindings: crypto : Add new compatible strings for qcom-qce > > Please convert these bindings to schemas. Ok, will fix it in v3. Thanks, Bhupesh > > > arm64/dts: qcom: Use new compatibles for crypto nodes > > crypto: qce: Add new compatibles for qce crypto driver > > crypto: qce: Print a failure msg in case probe() fails > > crypto: qce: Convert the device found dev_dbg() to dev_info() > > dma: qcom: bam_dma: Create a new header file for BAM DMA driver > > crypto: qce: Defer probing if BAM dma is not yet initialized > > crypto: qce: Defer probe in case interconnect is not yet initialized > > arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. > > > > Thara Gopinath (3): > > dma: qcom: bam_dma: Add support to initialize interconnect path > > crypto: qce: core: Add support to initialize interconnect path > > crypto: qce: core: Make clocks optional > > > > .../devicetree/bindings/crypto/qcom-qce.txt | 22 +- > > .../devicetree/bindings/dma/qcom_bam_dma.txt | 5 + > > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +- > > arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++ > > drivers/crypto/qce/core.c | 112 +++++-- > > drivers/crypto/qce/core.h | 3 + > > drivers/dma/qcom/bam_dma.c | 306 ++---------------- > > include/soc/qcom/bam_dma.h | 290 +++++++++++++++++ > > 9 files changed, 457 insertions(+), 317 deletions(-) > > create mode 100644 include/soc/qcom/bam_dma.h > > > > -- > > 2.30.2 > >
On 5/18/21 11:07 AM, Bjorn Andersson wrote: > On Wed 05 May 16:37 CDT 2021, Bhupesh Sharma wrote: > >> From: Thara Gopinath <thara.gopinath@linaro.org> >> >> Crypto engine on certain Snapdragon processors like sm8150, sm8250, sm8350 >> etc. requires interconnect path between the engine and memory to be >> explicitly enabled and bandwidth set prior to any operations. Add support >> in the qce core to enable the interconnect path appropriately. >> >> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Andy Gross <agross@kernel.org> >> Cc: Herbert Xu <herbert@gondor.apana.org.au> >> Cc: David S. Miller <davem@davemloft.net> >> Cc: Stephen Boyd <sboyd@kernel.org> >> Cc: Michael Turquette <mturquette@baylibre.com> >> Cc: Vinod Koul <vkoul@kernel.org> >> Cc: dmaengine@vger.kernel.org >> Cc: linux-clk@vger.kernel.org >> Cc: linux-crypto@vger.kernel.org >> Cc: devicetree@vger.kernel.org >> Cc: linux-kernel@vger.kernel.org >> Cc: bhupesh.linux@gmail.com >> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >> [Make header file inclusion alphabetical] >> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> > > This says that you prepared the patch, then Thara picked up the patch > and sorted the includes. But somehow you then sent the patch. > > I.e. you name should be the last - unless you jointly wrote the path, in > which case you should also add a "Co-developed-by: Thara". > >> --- >> drivers/crypto/qce/core.c | 35 ++++++++++++++++++++++++++++------- >> drivers/crypto/qce/core.h | 1 + >> 2 files changed, 29 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c >> index 80b75085c265..92a0ff1d357e 100644 >> --- a/drivers/crypto/qce/core.c >> +++ b/drivers/crypto/qce/core.c >> @@ -5,6 +5,7 @@ >> >> #include <linux/clk.h> >> #include <linux/dma-mapping.h> >> +#include <linux/interconnect.h> >> #include <linux/interrupt.h> >> #include <linux/module.h> >> #include <linux/mod_devicetable.h> >> @@ -21,6 +22,8 @@ >> #define QCE_MAJOR_VERSION5 0x05 >> #define QCE_QUEUE_LENGTH 1 >> >> +#define QCE_DEFAULT_MEM_BANDWIDTH 393600 > > Do we know what this rate is? > >> + >> static const struct qce_algo_ops *qce_ops[] = { >> #ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER >> &skcipher_ops, >> @@ -202,21 +205,35 @@ static int qce_crypto_probe(struct platform_device *pdev) >> if (ret < 0) >> return ret; >> >> + qce->mem_path = of_icc_get(qce->dev, "memory"); > > Using devm_of_icc_get() would save you some changes to the error path. Right. I keep forgetting to use the devm_ version! Bhupesh, will you do these changes or do you want me to ? -- Warm Regards Thara
Changes since v1: ================= - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ - v1 did not work well as reported earlier by Dmitry, so v2 contains the following changes/fixes: ~ Enable the interconnect path b/w BAM DMA and main memory first before trying to access the BAM DMA registers. ~ Enable the interconnect path b/w qce crytpo and main memory first before trying to access the qce crypto registers. ~ Make sure to document the required and optional properties for both BAM DMA and qce crypto drivers. ~ Add a few debug related print messages in case the qce crypto driver passes or fails to probe. ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA or the interconnect driver(s) (needed on specific Qualcomm parts) are not yet probed. Qualcomm crypto engine is also available on sm8250 SoC. It supports hardware accelerated algorithms for encryption and authentication. It also provides support for aes, des, 3des encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) authentication algorithms. Tested the enabled crypto algorithms with cryptsetup test utilities on sm8250-mtp and RB5 board (see [1]). While at it, also make a minor fix in 'sdm845.dtsi', to make sure it confirms with the other .dtsi files which expose crypto nodes on qcom SoCs. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David S. Miller <davem@davemloft.net> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Bhupesh Sharma (14): dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to optional properties dt-bindings: qcom-bam: Add 'iommus' to required properties dt-bindings: qcom-qce: Add 'iommus' to required properties dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to optional properties arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly dt-bindings: crypto : Add new compatible strings for qcom-qce arm64/dts: qcom: Use new compatibles for crypto nodes crypto: qce: Add new compatibles for qce crypto driver crypto: qce: Print a failure msg in case probe() fails crypto: qce: Convert the device found dev_dbg() to dev_info() dma: qcom: bam_dma: Create a new header file for BAM DMA driver crypto: qce: Defer probing if BAM dma is not yet initialized crypto: qce: Defer probe in case interconnect is not yet initialized arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. Thara Gopinath (3): dma: qcom: bam_dma: Add support to initialize interconnect path crypto: qce: core: Add support to initialize interconnect path crypto: qce: core: Make clocks optional .../devicetree/bindings/crypto/qcom-qce.txt | 22 +- .../devicetree/bindings/dma/qcom_bam_dma.txt | 5 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++ drivers/crypto/qce/core.c | 112 +++++-- drivers/crypto/qce/core.h | 3 + drivers/dma/qcom/bam_dma.c | 306 ++---------------- include/soc/qcom/bam_dma.h | 290 +++++++++++++++++ 9 files changed, 457 insertions(+), 317 deletions(-) create mode 100644 include/soc/qcom/bam_dma.h -- 2.30.2