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Mon, 10 May 2021 03:28:57 +0000 From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan <peng.fan@nxp.com> Subject: [PATCH V3 00/13] soc: imx: gpcv2: support i.MX8MM Date: Mon, 10 May 2021 12:00:32 +0800 Message-Id: <20210510040045.13225-1-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR04CA0184.apcprd04.prod.outlook.com (2603:1096:4:14::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; 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soc: imx: gpcv2: support i.MX8MM
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On Mon, 10 May 2021 12:00:40 +0800, Peng Fan (OSS) wrote: > From: Lucas Stach <l.stach@pengutronix.de> > > For some domains the resets of the devices in the domain are not > automatically triggered. Add an optional resets property to allow > the GPC driver to trigger those resets explicitly. > > The resets belong to devices located inside the power domain, > which need to be held in reset across the power-up sequence. So we > have no means to specify what each reset is in a generic power-domain > binding. Same situation as with the clocks in this binding actually. > > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
From: Peng Fan <peng.fan@nxp.com> V3: Add R-b/T-b tag from Frieder For Patch 8, add the explaination in yaml file per Rob and Frieder V2: - Add R-b/A-b tag - Merge V1 patch 13 to V2 patch 6 - Drop V1 patch 15 - Merge V1 patch 16 to V2 patch 5 and add comments in patch 5 to explain details - Add explaination in patch 8 for "why the resets are not defined" This patchset is a pick up Lucas's gpcv2 work for i.MX8MM and several minor changes from me to make it could work with i.MX BLK-CTL driver. Thanks for Lucas's work and suggestion, Frieder Schrempf for collecting all the patches, Jacky Bai on help debug issues. Lucas Stach (12): soc: imx: gpcv2: move to more ideomatic error handling in probe soc: imx: gpcv2: move domain mapping to domain driver probe soc: imx: gpcv2: switch to clk_bulk_* API soc: imx: gpcv2: split power up and power down sequence control soc: imx: gpcv2: wait for ADB400 handshake soc: imx: gpcv2: add runtime PM support for power-domains soc: imx: gpcv2: allow domains without power-sequence control dt-bindings: imx: gpcv2: add support for optional resets soc: imx: gpcv2: add support for optional resets dt-bindings: power: add defines for i.MX8MM power domains soc: imx: gpcv2: add support for i.MX8MM power domains soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains Peng Fan (1): soc: imx: gpcv2: move reset assert after requesting domain power up .../bindings/power/fsl,imx-gpcv2.yaml | 12 + drivers/soc/imx/gpcv2.c | 542 ++++++++++++++---- include/dt-bindings/power/imx8mm-power.h | 22 + 3 files changed, 461 insertions(+), 115 deletions(-) create mode 100644 include/dt-bindings/power/imx8mm-power.h -- 2.30.0