| Message ID | 20210630023504.18177-1-yong.wu@mediatek.com |
|---|---|
| Headers | show |
| Series | MT8195 IOMMU SUPPORT | expand |
On 30/06/2021 04:34, Yong Wu wrote: > In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters > mainly are PCIe and USB. Different with MM IOMMU, all these masters > connect with IOMMU directly, there is no mediatek,larbs property for > infra IOMMU. > > Another thing is about PCIe ports. currently the function > "of_iommu_configure_dev_id" only support the id number is 1, But our > PCIe have two ports, one is for reading and the other is for writing. > see more about the PCIe patch in this patchset. Thus, I only list > the reading id here and add the other id in our driver. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > .../bindings/iommu/mediatek,iommu.yaml | 14 +++++++++++++- > .../dt-bindings/memory/mt8195-memory-port.h | 18 ++++++++++++++++++ > include/dt-bindings/memory/mtk-memory-port.h | 2 ++ > 3 files changed, 33 insertions(+), 1 deletion(-) > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Best regards, Krzysztof
This patchset add mt8195 iommu supports. mt8195 have 3 IOMMU HWs. 2 IOMMU HW is for multimedia, and 1 IOMMU HW is for infra-master, like PCIe/USB. About the 2 MM IOMMU HW, something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON(VDO) SMI_COMMON(VPP) --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... these two MM IOMMU HW share a pgtable. About the INFRA IOMMU, it don't have larbs, the master connects the iommu directly. It use a dependent pgtable. Also, mt8195 IOMMU bank supports..Normally the IOMMU register size only is 0x1000. In this IOMMU HW, the register size is 5 * 0x1000. each 0x1000 is a bank. the banks' register look like this: ---------------------------------------- |bank0 | bank1 | bank2 | bank3 | bank4| ---------------------------------------- |global | |control| null |regs | ----------------------------------------- |bank |bank |bank |bank |bank | |regs |regs |regs |regs |regs | | | | | | | ----------------------------------------- All the banks share some global control registers, and each bank have its special bank registers, like pgtable base registser, tlb operation registers, the fault status registers. In mt8195, we enable this bank feature for infra iommu, We put PCIe in bank0 and USB in bank4. they have independent pgtable. patch[1..15]: support mt8195 iommu. patch[16..24]: support bank feature. base on v5.13-rc1. todo: there is another APU_IOMMU in mt8195, this should depend on APU patches. thus, we need add that feature after that. --- Yong Wu (24): dt-bindings: mediatek: mt8195: Add binding for MM IOMMU dt-bindings: mediatek: mt8195: Add binding for infra IOMMU iommu/mediatek: Fix 2 HW sharing pgtable issue iommu/mediatek: Adapt sharing and non-sharing pgtable case iommu/mediatek: Add 12G~16G support for mult domain iommu/mediatek: Add a flag DCM_DISABLE iommu/mediatek: Add flag NON_STD_AXI iommu/mediatek: Remove for_each_m4u in tlb_sync_all iommu/mediatek: Always pm_runtime_get while tlb flush iommu/mediatek: Always enable output PA over 32bits iommu/mediatek: Add SUB_COMMON_3BITS flag iommu/mediatek: Add IOMMU_TYPE flag iommu/mediatek: Add infra iommu support iommu/mediatek: Add PCIe support iommu/mediatek: Add mt8195 support iommu/mediatek: Only adjust code about register base iommu/mediatek: Just move code position in hw_init iommu/mediatek: Add mtk_iommu_bank_data structure iommu/mediatek: Initialise bank HW for each a bank iommu/mediatek: Add bank_nr and bank_enable iommu/mediatek: Change the domid to iova_region_id iommu/mediatek: Get the proper bankid for multi banks iommu/mediatek: Add multi bank support iommu/mediatek: mt8195: Enable multi-bank for infra iommu .../bindings/iommu/mediatek,iommu.yaml | 21 +- drivers/iommu/mtk_iommu.c | 760 ++++++++++++------ drivers/iommu/mtk_iommu.h | 33 +- .../dt-bindings/memory/mt8195-memory-port.h | 408 ++++++++++ include/dt-bindings/memory/mtk-memory-port.h | 2 + 5 files changed, 961 insertions(+), 263 deletions(-) create mode 100644 include/dt-bindings/memory/mt8195-memory-port.h