| Message ID | 20220127173450.3684318-1-robert.hancock@calian.com |
|---|---|
| Headers | show |
| Series | Xilinx AMS fixes | expand |
On Thu, 27 Jan 2022 11:34:46 -0600 Robert Hancock <robert.hancock@calian.com> wrote: > Various fixes for the Xilinx AMS driver. > > Changes since v1: > -drop addition to ZynqMP device tree, will be submitted elsewhere > -add patch to fix DT binding to add missing clock entry I'm fine with these but would like to leave them all on list a tiny bit longer so we can hopefully get some review, particularly on patches 1 and 4. Jonathan > > Robert Hancock (4): > dt-bindings: iio: adc: zynqmp_ams: Add clock entry > iio: adc: xilinx-ams: Fixed missing PS channels > iio: adc: xilinx-ams: Fixed wrong sequencer register settings > iio: adc: xilinx-ams: Fix single channel switching sequence > > .../bindings/iio/adc/xlnx,zynqmp-ams.yaml | 8 ++++++++ > drivers/iio/adc/xilinx-ams.c | 15 +++++++++++---- > 2 files changed, 19 insertions(+), 4 deletions(-) >
On Wed, 9 Feb 2022 19:49:27 +0000 Robert Hancock <robert.hancock@calian.com> wrote: > On Sun, 2022-01-30 at 12:46 +0000, Jonathan Cameron wrote: > > On Thu, 27 Jan 2022 11:34:46 -0600 > > Robert Hancock <robert.hancock@calian.com> wrote: > > > > > Various fixes for the Xilinx AMS driver. > > > > > > Changes since v1: > > > -drop addition to ZynqMP device tree, will be submitted elsewhere > > > -add patch to fix DT binding to add missing clock entry > > > > I'm fine with these but would like to leave them all on list a tiny > > bit longer so we can hopefully get some review, particularly on patches > > 1 and 4. > > > > Jonathan > > Hi all, > > I don't think I've gotten any feedback. Is anyone able to review/test? > Michal, If you have a chance to take a quick look at this series that would be great. Thanks, Jonathan > > > > > Robert Hancock (4): > > > dt-bindings: iio: adc: zynqmp_ams: Add clock entry > > > iio: adc: xilinx-ams: Fixed missing PS channels > > > iio: adc: xilinx-ams: Fixed wrong sequencer register settings > > > iio: adc: xilinx-ams: Fix single channel switching sequence > > > > > > .../bindings/iio/adc/xlnx,zynqmp-ams.yaml | 8 ++++++++ > > > drivers/iio/adc/xilinx-ams.c | 15 +++++++++++---- > > > 2 files changed, 19 insertions(+), 4 deletions(-) > > >
On Mon, 28 Feb 2022 07:40:59 +0100 Michal Simek <michal.simek@xilinx.com> wrote: > On 2/26/22 17:45, Jonathan Cameron wrote: > > On Wed, 9 Feb 2022 19:49:27 +0000 > > Robert Hancock <robert.hancock@calian.com> wrote: > > > >> On Sun, 2022-01-30 at 12:46 +0000, Jonathan Cameron wrote: > >>> On Thu, 27 Jan 2022 11:34:46 -0600 > >>> Robert Hancock <robert.hancock@calian.com> wrote: > >>> > >>>> Various fixes for the Xilinx AMS driver. > >>>> > >>>> Changes since v1: > >>>> -drop addition to ZynqMP device tree, will be submitted elsewhere > >>>> -add patch to fix DT binding to add missing clock entry > >>> > >>> I'm fine with these but would like to leave them all on list a tiny > >>> bit longer so we can hopefully get some review, particularly on patches > >>> 1 and 4. > >>> > >>> Jonathan > >> > >> Hi all, > >> > >> I don't think I've gotten any feedback. Is anyone able to review/test? > >> > > Michal, > > > > If you have a chance to take a quick look at this series that would > > be great. > > That series looks good to me. Please apply and feel free to add my > > Acked-by: Michal Simek <michal.simek@xilinx.com> > Applied to the fixes-togreg branch of iio.git. I'm not certain I'll get a fixes pull request out in time to make this cycle so these might get dragged across to my togreg branch and added to a pull request for the merge window. Or, possibly Greg will take them for the merge window even if I do a separate pull given we are close to the end of the cycle. Thanks, Jonathan > Thanks, > Michal