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[v3,0/3] Add R5F and C71 DSP nodes for J784S4 SoC

Message ID 20230502231527.25879-1-hnagalla@ti.com
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Series Add R5F and C71 DSP nodes for J784S4 SoC | expand

Message

Hari Nagalla May 2, 2023, 11:15 p.m. UTC 
This series adds the R5F cluster and C71 DSP processor nodes for
J784S4 SoC.

The first patch adds R5F cluster nodes to the MAIN and MCU voltage
domains of J784S4 SoC. The second patch adds the C71 DSP processor
nodes to the MAIN voltage domain of J784S4 SoC and the third patch
reserves the IPC shared memory for Virtio/Vring buffers.

Changes in V3:
- Add memory reservations for remote proc IPC in board file.
V2: https://lore.kernel.org/all/20230330141536.22480-1-hnagalla@ti.com/ 

Changes in V2:
- Removed default disable of R5F nodes in the SoC device tree.
- Consolidated R5F nodes into one patch.
V1: https://lore.kernel.org/all/20230329093627.30719-1-hnagalla@ti.com/

Hari Nagalla (3):
  arm64: dts: ti: k3-j784s4-main: Add R5F cluster nodes
  arm64: dts: ti: k3-j784s4-main: Add C71x DSP nodes
  arm64: dts: ti: k3-j784s4-evm: Reserve memory for remote proc IPC

 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts      | 318 ++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 168 +++++++++
 .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     |  40 +++
 3 files changed, 526 insertions(+)