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[v2,0/3] mailbox: zynqmp: Enable Bufferless IPIs for Versal based SOCs

Message ID 20240111172226.1816105-1-ben.levinsky@amd.com
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Series mailbox: zynqmp: Enable Bufferless IPIs for Versal based SOCs | expand

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Ben Levinsky Jan. 11, 2024, 5:22 p.m. UTC 
For Xilinx-AMD Versal and Versal NET SOC's there exist also
inter-processor-interrupts (IPIs) without IPI Message Buffers. For these
enable use of IPI Mailbox driver for send/receive as well.

This is enabled with new compatible string: "xlnx,versal-ipi-mailbox"

Original, buffered usage for ZynqMP based SOC is still supported.

Note that the linked patch provides corresponding bindings.
Depends on: https://lore.kernel.org/all/20231214054224.957336-3-tanmay.shah@amd.com/T/

v2:
- formatting in 2/3 patch
- remove extra handling in 3/3 versal_ipi_setup()

Ben Levinsky (3):
  mailbox: zynqmp: Move of_match structure closer to usage
  mailbox: zynqmp: Move buffered IPI setup to of_match selected routine
  mailbox: zynqmp: Enable Bufferless IPI usage on Versal-based SOC's

 drivers/mailbox/zynqmp-ipi-mailbox.c | 258 ++++++++++++++++++++++-----
 1 file changed, 214 insertions(+), 44 deletions(-)