Show patches with: Submitter = Zong Li       |   21 patches
Patch Series S/W/F Date Submitter Delegate State
[v5,6/7] soc: sifive: ccache: define the macro for the register shifts Use composable cache instead of L2 cache --- 2022-09-13 Zong Li Superseded
[v5,4/7] soc: sifive: ccache: reduce printing on init Use composable cache instead of L2 cache --- 2022-09-13 Zong Li Superseded
[v5,2/7] soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. Use composable cache instead of L2 cache --- 2022-09-13 Zong Li New
[v4,6/6] soc: sifive: ccache: define the macro for the register shifts Use composable cache instead of L2 cache --- 2022-09-12 Zong Li Accepted
[v4,5/6] soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes Use composable cache instead of L2 cache --- 2022-09-12 Zong Li New
[v4,4/6] soc: sifive: ccache: reduce printing on init Use composable cache instead of L2 cache --- 2022-09-12 Zong Li New
[v4,3/6] soc: sifive: ccache: determine the cache level from dts Use composable cache instead of L2 cache --- 2022-09-12 Zong Li Accepted
[v4,2/6] soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. Use composable cache instead of L2 cache --- 2022-09-12 Zong Li Superseded
[v4,1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache Use composable cache instead of L2 cache --- 2022-09-12 Zong Li Accepted
[v3,6/6] soc: sifive: ccache: define the macro for the register shifts [v3,1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache --- 2022-09-08 Zong Li Superseded
[v3,3/6] soc: sifive: ccache: determine the cache level from dts [v3,1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache --- 2022-09-08 Zong Li Superseded
[v3,1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache [v3,1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache --- 2022-09-08 Zong Li Superseded
[v2,6/6] EDAC/sifive: use sifive_ccache instead of sifive_l2 Use composable cache instead of L2 cache --- 2022-09-05 Zong Li New
[v2,4/6] soc: sifive: ccache: reduce printing on init Use composable cache instead of L2 cache --- 2022-09-05 Zong Li Superseded
[v2,2/6] soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. Use composable cache instead of L2 cache --- 2022-09-05 Zong Li Superseded
[v7,2/3] riscv: dts: Add dma-channels property and modify compatible Determine the number of DMA channels by 'dma-channels' property --- 2022-03-07 Zong Li New
[4/4] clk: sifive: Move all stuff into SoCs header files from C files [1/4] dt-bindings: change the macro name of prci in header files and example --- 2022-01-19 Zong Li Accepted
[1/4] dt-bindings: change the macro name of prci in header files and example [1/4] dt-bindings: change the macro name of prci in header files and example --- 2022-01-19 Zong Li Accepted
[v3,3/3] dmaengine: sf-pdma: Get number of channel by device tree Determine the number of DMA channels by 'dma-channels' property --- 2022-01-14 Zong Li New
[v3,2/3] dt-bindings: Add dma-channels for pdma device node Determine the number of DMA channels by 'dma-channels' property --- 2022-01-14 Zong Li New
[v3,1/3] riscv: dts: Add dma-channels property in dma node Determine the number of DMA channels by 'dma-channels' property --- 2022-01-14 Zong Li New