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Show patches with
: Submitter =
Yu-Chien Peter Lin
| Archived =
No
| 25 patches
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------
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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v8,10/10] riscv: andes: Support specifying symbolic firmware and hardware raw events
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
New
[v8,08/10] dt-bindings: riscv: Add Andes PMU extension description
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
Accepted
[v8,05/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
Accepted
[v8,04/10] dt-bindings: riscv: Add Andes interrupt controller compatible string
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
Accepted
[v8,02/10] irqchip/riscv-intc: Allow large non-standard interrupt number
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
New
[v8,01/10] riscv: errata: Rename defines for Andes
[v8,01/10] riscv: errata: Rename defines for Andes
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2024-01-29
Yu-Chien Peter Lin
Accepted
[v6,16/16] riscv: andes: Support specifying symbolic firmware and hardware raw events
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
Superseded
[v6,13/16] riscv: dts: sophgo: Add T-Head PMU extension for sg2042
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
New
[v6,12/16] riscv: dts: sophgo: Add T-Head PMU extension for cv1800b
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
New
[v6,11/16] riscv: dts: allwinner: Add T-Head PMU extension for sun20i-d1s
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
New
[v6,10/16] dt-bindings: riscv: Add Andes PMU extension description
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
New
[v6,09/16] dt-bindings: riscv: Add T-Head PMU extension description
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
New
[v6,06/16] perf: RISC-V: Eliminate redundant interrupt enable/disable operations
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
Accepted
[v6,05/16] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
Superseded
[v6,03/16] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller
Untitled series #231269
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2023-12-25
Yu-Chien Peter Lin
Accepted
[v4,12/13] riscv: dts: renesas: Add Andes PMU extension
Support Andes PMU extension
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2023-11-22
Yu-Chien Peter Lin
New
[v4,11/13] riscv: dts: allwinner: Add T-Head PMU extension
Support Andes PMU extension
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-
2023-11-22
Yu-Chien Peter Lin
Superseded
[v4,09/13] dt-bindings: riscv: Add T-Head PMU extension description
Support Andes PMU extension
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2023-11-22
Yu-Chien Peter Lin
Superseded
[v4,06/13] perf: RISC-V: Eliminate redundant interrupt enable/disable operations
Support Andes PMU extension
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2023-11-22
Yu-Chien Peter Lin
Superseded
[v4,02/13] irqchip/riscv-intc: Allow large non-standard interrupt number
Support Andes PMU extension
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2023-11-22
Yu-Chien Peter Lin
New
[v4,01/13] riscv: errata: Rename defines for Andes
Support Andes PMU extension
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2023-11-22
Yu-Chien Peter Lin
Superseded
[v3,05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC
Support Andes PMU extension
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2023-10-22
Yu-Chien Peter Lin
Superseded
[RFC,v3,02/13] irqchip/riscv-intc: Allow large non-standard hwirq number
Support Andes PMU extension
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2023-10-22
Yu-Chien Peter Lin
Superseded
[v2,09/10] riscv: dts: renesas: Add Andes PMU extension
Untitled series #225032
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2023-10-19
Yu-Chien Peter Lin
Superseded
[v2,05/10] dt-bindings: riscv: Add andestech,cpu-intc to interrupt-controller
Untitled series #225032
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2023-10-19
Yu-Chien Peter Lin
New