From patchwork Mon Jan 23 21:30:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 646219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F9B7C25B50 for ; Mon, 23 Jan 2023 21:31:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231847AbjAWVbT (ORCPT ); Mon, 23 Jan 2023 16:31:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233097AbjAWVbS (ORCPT ); Mon, 23 Jan 2023 16:31:18 -0500 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D3323346D; Mon, 23 Jan 2023 13:31:16 -0800 (PST) Received: by mail-ej1-x62c.google.com with SMTP id ud5so34125387ejc.4; Mon, 23 Jan 2023 13:31:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:references:cc:to:from :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=iYvlmmfxDA4UUYf/OiK9s+1lN1pQhhBjaQvJA7GeHrY=; b=gUEI6zRAj/toXCWg15SMXa4U6wjilHQGxEWtelW9DRLXhdKeD1724qo8iMhxjKi3fq BPNhhJrV4zVSt3XnVJmyBPqR6G2FNkqphGcPhsz4K61f/hH7aw26VsXACAaAKtexdxKY r59oAeGEQklpjS5OACquZ0FzW4KHI+NQq9U2ASZ8Fa2xTWdCE0a6RgrrwB7vYtd43aRD Zhz9EJTrRw6MOM0FccFYKH+7BiuvVr+Fogp94gnYESPwXxsFUTPcdGcIk/GHKlcwgYVk owXL0QLbp5rUdKZFH4f0iJ3+GGI8izzpZR86lcbGc1Qhm4WRvmgvKABob1xni5bhNDAf icJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:references:cc:to:from :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=iYvlmmfxDA4UUYf/OiK9s+1lN1pQhhBjaQvJA7GeHrY=; b=0bHOFNsAC/NkhIKnosHPcvbP5GgiCWlRe2LgzqSr6+e+1ABJKbcKsK1ASJ/NCDyjxB zutMPpRH9CzojMq8qBayfoyA9/tGMWyP7icT7UwM7mCmvjXvtd9BbQfqnKeJOQx/DkWM 2tzD1PVduxbc1+VdtqW8bH+zjgb1S/pRMRaoKx35dKcVhHl3VynPAFn8golNPUkasfYP i0GOLYvCYPrkdlckX5QJjqyZqC/dYVbeY7hFqVIHw5suCfTHeOK87BgZhP9/OB2Y3Vrb GqJtIt99l5fqsRquSdroPcR6j3B9M7R2ismlIyFIdwIJAMukz8mkeaaix6QEs7A5Bv5k bjXA== X-Gm-Message-State: AFqh2kojwNv9UtxilbrolQO+3Fp+1vefP6aKFYT5w7dRZamghqicK02/ sHkFiwzhoF0SmJ6hEjaKmD8= X-Google-Smtp-Source: AMrXdXsU1QYt+uhl4UILU762+HzA5I95FGeqPAQLsQZxB51622KAxepCuLeZpk1RQgJ7ETOrF6VrrQ== X-Received: by 2002:a17:907:2b1f:b0:870:1550:82bc with SMTP id gc31-20020a1709072b1f00b00870155082bcmr23028933ejc.55.1674509474852; Mon, 23 Jan 2023 13:31:14 -0800 (PST) Received: from ?IPV6:2a01:c23:bc5b:9400:dc4c:6fb7:47b2:beb7? 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[2a01:c23:bc5b:9400:dc4c:6fb7:47b2:beb7]) by smtp.googlemail.com with ESMTPSA id ky25-20020a170907779900b00877596d4eadsm8809611ejc.101.2023.01.23.13.31.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Jan 2023 13:31:14 -0800 (PST) Message-ID: <06289641-18b1-320d-6162-7ae176452f31@gmail.com> Date: Mon, 23 Jan 2023 22:30:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: [PATCH 7/8] dt-bindings: interrupt-controller: Add Amlogic Meson GPIO interrupt controller binding Content-Language: en-US From: Heiner Kallweit To: Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Alessandro Zummo , Alexandre Belloni , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Thomas Gleixner , Marc Zyngier , Linus Walleij Cc: "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Amlogic Meson..." , linux-pwm@vger.kernel.org, linux-rtc@vger.kernel.org, "linux-gpio@vger.kernel.org" References: In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Amlogic Meson GPIO interrupt controller binding. Tested with make targets dt_binding_check and dtbs_check. Signed-off-by: Heiner Kallweit --- .../amlogic,meson-gpio-intc.txt | 38 ---------- .../amlogic,meson-gpio-intc.yaml | 72 +++++++++++++++++++ 2 files changed, 72 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt deleted file mode 100644 index bde63f8f0..000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt +++ /dev/null @@ -1,38 +0,0 @@ -Amlogic meson GPIO interrupt controller - -Meson SoCs contains an interrupt controller which is able to watch the SoC -pads and generate an interrupt on edge or level. The controller is essentially -a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge -or level and polarity. It does not expose all 256 mux inputs because the -documentation shows that the upper part is not mapped to any pad. The actual -number of interrupt exposed depends on the SoC. - -Required properties: - -- compatible : must have "amlogic,meson8-gpio-intc" and either - "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or - "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or - "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or - "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) - "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X) - "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2) - "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3) - "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L) - "amlogic,meson-s4-gpio-intc" for S4 SoCs (S802X2, S905Y4, S805X2G, S905W2) -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 2. -- meson,channel-interrupts: Array with the 8 upstream hwirq numbers. These - are the hwirqs used on the parent interrupt controller. - -Example: - -gpio_interrupt: interrupt-controller@9880 { - compatible = "amlogic,meson-gxbb-gpio-intc", - "amlogic,meson-gpio-intc"; - reg = <0x0 0x9880 0x0 0x10>; - interrupt-controller; - #interrupt-cells = <2>; - meson,channel-interrupts = <64 65 66 67 68 69 70 71>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml new file mode 100644 index 000000000..2f6261b9e --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/amlogic,meson-gpio-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson GPIO interrupt controller + +maintainers: + - Heiner Kallweit + +description: | + Meson SoCs contains an interrupt controller which is able to watch the SoC + pads and generate an interrupt on edge or level. The controller is essentially + a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge + or level and polarity. It does not expose all 256 mux inputs because the + documentation shows that the upper part is not mapped to any pad. The actual + number of interrupt exposed depends on the SoC. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - amlogic,meson8-gpio-intc + - amlogic,meson8b-gpio-intc + - amlogic,meson-gxbb-gpio-intc + - amlogic,meson-gxl-gpio-intc + - amlogic,meson-axg-gpio-intc + - amlogic,meson-g12a-gpio-intc + - amlogic,meson-sm1-gpio-intc + - amlogic,meson-a1-gpio-intc + - amlogic,meson-s4-gpio-intc + - amlogic,meson-sc2-gpio-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + amlogic,channel-interrupts: + description: Array with the upstream hwirq numbers + $ref: /schemas/types.yaml#/definitions/uint32-array + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - amlogic,channel-interrupts + +additionalProperties: false + +examples: + - | + bus@c1100000 { + reg = <0x0 0xc1100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-controller@9880 { + compatible = "amlogic,meson-gxbb-gpio-intc"; + reg = <0x0 0x9880 0x0 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; + }; + };