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[2001:1868:205::9]) by mx.google.com with ESMTPS id y46si958037qgy.90.2014.05.21.04.23.58 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 May 2014 04:23:58 -0700 (PDT) Received-SPF: none (google.com: linux-mtd-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn4ax-0008He-Tb; Wed, 21 May 2014 11:22:03 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn4aq-00085j-4n; Wed, 21 May 2014 11:21:57 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s4LBLXvB014559; Wed, 21 May 2014 06:21:33 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4LBLXW4021106; Wed, 21 May 2014 06:21:33 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Wed, 21 May 2014 06:21:33 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4LBLAAa018495; Wed, 21 May 2014 06:21:30 -0500 From: Roger Quadros To: , Subject: [RFC PATCH 05/16] ARM: OMAP2+: gpmc: Use low level read/write for context save/restore Date: Wed, 21 May 2014 14:20:53 +0300 Message-ID: <1400671264-10702-6-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400671264-10702-1-git-send-email-rogerq@ti.com> References: <1400671264-10702-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140521_042156_331590_6903D553 X-CRM114-Status: GOOD ( 15.19 ) X-Spam-Score: -5.7 (-----) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-5.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record Cc: devicetree@vger.kernel.org, robertcnelson@gmail.com, jg1.han@samsung.com, nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, pekon@ti.com, ezequiel.garcia@free-electrons.com, javier@dowhile0.org, linux-omap@vger.kernel.org, dwmw2@infradead.org, Roger Quadros X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This will make it easier to move the GPMC driver out of arch/arm/mach-omap2. Just the context save/restore code can remain there without any dependency with the GPMC driver. Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/gpmc.c | 121 +++++++++++++++++++++++++++++++-------------- arch/arm/mach-omap2/gpmc.h | 1 + arch/arm/mach-omap2/io.c | 2 + 3 files changed, 88 insertions(+), 36 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 04bae67..26b26ec 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1976,34 +1976,80 @@ static irqreturn_t gpmc_handle_irq(int irq, void *dev) static struct omap3_gpmc_regs gpmc_context; +/* + * Below code only for OMAP3 OFF mode support. + * This code must be left back in mach-omap2. + */ +void __iomem *omap2_gpmc_base; + +void __init omap2_set_globals_gpmc(void __iomem *gpmc) +{ + omap2_gpmc_base = gpmc; +} + +static u32 _gpmc_read_reg(u16 reg) +{ + return __raw_readl(omap2_gpmc_base + reg); +} + +static void _gpmc_write_reg(u32 val, u16 reg) +{ + __raw_readl(omap2_gpmc_base + reg); +} + +static u32 _gpmc_cs_read_reg(int cs, int idx) +{ + u16 reg; + + reg = GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; + + return _gpmc_read_reg(reg); +} + +static void _gpmc_cs_write_reg(int cs, int idx, u32 val) +{ + u16 reg; + + reg = GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; + _gpmc_write_reg(val, reg); +} + void omap3_gpmc_save_context(void) { int i; + u32 val; + + if (!omap2_gpmc_base) + return; - gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); - gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); - gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); - gpmc_context.config = gpmc_read_reg(GPMC_CONFIG); - gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); - gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); - gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); + gpmc_context.sysconfig = _gpmc_read_reg(GPMC_SYSCONFIG); + gpmc_context.irqenable = _gpmc_read_reg(GPMC_IRQENABLE); + gpmc_context.timeout_ctrl = _gpmc_read_reg(GPMC_TIMEOUT_CONTROL); + gpmc_context.config = _gpmc_read_reg(GPMC_CONFIG); + gpmc_context.prefetch_config1 = _gpmc_read_reg(GPMC_PREFETCH_CONFIG1); + gpmc_context.prefetch_config2 = _gpmc_read_reg(GPMC_PREFETCH_CONFIG2); + gpmc_context.prefetch_control = _gpmc_read_reg(GPMC_PREFETCH_CONTROL); for (i = 0; i < gpmc_cs_num; i++) { - gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i); + /* check if valid */ + val = _gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); + gpmc_context.cs_context[i].is_valid = + val & GPMC_CONFIG7_CSVALID; + if (gpmc_context.cs_context[i].is_valid) { gpmc_context.cs_context[i].config1 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); gpmc_context.cs_context[i].config2 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); gpmc_context.cs_context[i].config3 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); gpmc_context.cs_context[i].config4 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); gpmc_context.cs_context[i].config5 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); gpmc_context.cs_context[i].config6 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); gpmc_context.cs_context[i].config7 = - gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); + _gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); } } } @@ -2012,29 +2058,32 @@ void omap3_gpmc_restore_context(void) { int i; - gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); - gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); - gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); - gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); - gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); - gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); - gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); + if (!omap2_gpmc_base) + return; + + _gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); + _gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); + _gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); + _gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); + _gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); + _gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); + _gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); for (i = 0; i < gpmc_cs_num; i++) { if (gpmc_context.cs_context[i].is_valid) { - gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, - gpmc_context.cs_context[i].config1); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, - gpmc_context.cs_context[i].config2); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, - gpmc_context.cs_context[i].config3); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, - gpmc_context.cs_context[i].config4); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, - gpmc_context.cs_context[i].config5); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, - gpmc_context.cs_context[i].config6); - gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, - gpmc_context.cs_context[i].config7); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, + gpmc_context.cs_context[i].config1); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, + gpmc_context.cs_context[i].config2); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, + gpmc_context.cs_context[i].config3); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, + gpmc_context.cs_context[i].config4); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, + gpmc_context.cs_context[i].config5); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, + gpmc_context.cs_context[i].config6); + _gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, + gpmc_context.cs_context[i].config7); } } } diff --git a/arch/arm/mach-omap2/gpmc.h b/arch/arm/mach-omap2/gpmc.h index c18b022..795502f 100644 --- a/arch/arm/mach-omap2/gpmc.h +++ b/arch/arm/mach-omap2/gpmc.h @@ -107,4 +107,5 @@ extern int gpmc_generic_init(int cs, enum gpmc_omap_type type, struct platform_device *pdev, unsigned pdata_size); +void __init omap2_set_globals_gpmc(void __iomem *gpmc); #endif diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f14f9ac..e3321fd 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -53,6 +53,7 @@ #include "prm2xxx.h" #include "prm3xxx.h" #include "prm44xx.h" +#include "gpmc.h" /* * omap_clk_soc_init: points to a function that does the SoC-specific @@ -464,6 +465,7 @@ void __init omap3_init_early(void) NULL); omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); + omap2_set_globals_gpmc(OMAP2_L3_IO_ADDRESS(OMAP34XX_GPMC_BASE)); omap3xxx_check_revision(); omap3xxx_check_features(); omap3xxx_prm_init();