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[209.132.180.67]) by mx.google.com with ESMTP id df3si7601425pbb.203.2014.05.30.17.39.09; Fri, 30 May 2014 17:39:09 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935045AbaEaAjA (ORCPT + 28 others); Fri, 30 May 2014 20:39:00 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.21]:54636 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S935005AbaEaAi6 (ORCPT ); Fri, 30 May 2014 20:38:58 -0400 Received: from e106497-lin.cambridge.arm.com (e106497-lin.cambridge.arm.com [10.1.195.170]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id s4V0awgw003864; Sat, 31 May 2014 01:37:00 +0100 From: Liviu Dudau To: Bjorn Helgaas Cc: Kumar Gala , Rob Herring , Rob Herring , Grant Likely , Pawel Moll , Mark Rutland , Ian Campbell , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , linux-arm-msm , "linux-arm-kernel@lists.infradead.org" , Kishon Vijay Abraham I Subject: [PATCH 1/2] pci: Add IORESOURCE_BIT entry for PCIe ECAM resources. Date: Sat, 31 May 2014 01:36:40 +0100 Message-Id: <1401496601-31983-2-git-send-email-Liviu.Dudau@arm.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1401496601-31983-1-git-send-email-Liviu.Dudau@arm.com> References: <20140530233034.GH1677@bart.dudau.co.uk> <1401496601-31983-1-git-send-email-Liviu.Dudau@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: liviu.dudau@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , We would like to be able to describe PCIe ECAM resources as IORESOURCE_MEM blocks while distinguish them from standard memory resources. Add an IORESOURCE_BIT entry for this case. Signed-off-by: Liviu Dudau --- include/linux/ioport.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 5e3a906..9672533 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -103,6 +103,7 @@ struct resource { /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ +#define IORESOURCE_PCI_ECFG (1<<5) /* ECAM config resource */ /* helpers to define resources */