From patchwork Wed Jun 10 20:09:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 49732 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f199.google.com (mail-lb0-f199.google.com [209.85.217.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 139C8245D4 for ; Wed, 10 Jun 2015 20:10:05 +0000 (UTC) Received: by lbcue7 with SMTP id ue7sf14862731lbc.3 for ; Wed, 10 Jun 2015 13:10:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=qdfMMPDYod1S8B68jDLzSr1h6WJDKMgibPQ+fwc0Jh0=; b=jTJWi0weKX+h0xTrViM1HdnSxXscPvaW5wG7QIxU779Qrb6IasOn60AqtXaSImJwWN Ak24efvj5J7rCnrNfhjoEZLPJJ76nSHalM2m4lzloLMde1wSLs3R2/qYOHBkOVZd2Tb3 q2hjr7QV5e08NqgPXmFK16mlAiO9yOlApkUb+v6FeaB2ZqNoXTdJvQ/lxbQriHbKWgtL VZJ6hmDsiNivHbb/NNfYCEgFWlv+GDrJ/kaaxUKzVzVAiWC0qroagQ9y9Cbmh09GRbPR FcZQ3guebexLLrtCfNOuKxX+/h/b+hBsKjr0EhKCBgViwejHi7KwMPwjybQG926uS/2P DiUw== X-Gm-Message-State: ALoCoQnIBKljwIANaAzCViBygl2QTKnYCDKFc9xG0XYHSpNCLtcHKYW3cqKYPNcEYLvdx9LZXA4Y X-Received: by 10.180.11.101 with SMTP id p5mr5306272wib.3.1433967003206; Wed, 10 Jun 2015 13:10:03 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.9.37 with SMTP id w5ls279544laa.77.gmail; Wed, 10 Jun 2015 13:10:03 -0700 (PDT) X-Received: by 10.152.6.69 with SMTP id y5mr5836119lay.72.1433967003026; Wed, 10 Jun 2015 13:10:03 -0700 (PDT) Received: from mail-lb0-f173.google.com (mail-lb0-f173.google.com. [209.85.217.173]) by mx.google.com with ESMTPS id qs3si9925014lbb.164.2015.06.10.13.10.03 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Jun 2015 13:10:03 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.173 as permitted sender) client-ip=209.85.217.173; Received: by lbcmx3 with SMTP id mx3so34884318lbc.1 for ; Wed, 10 Jun 2015 13:10:02 -0700 (PDT) X-Received: by 10.112.209.106 with SMTP id ml10mr5833019lbc.112.1433967002922; Wed, 10 Jun 2015 13:10:02 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp3559954lbb; Wed, 10 Jun 2015 13:10:02 -0700 (PDT) X-Received: by 10.180.72.176 with SMTP id e16mr12201678wiv.12.1433967000544; Wed, 10 Jun 2015 13:10:00 -0700 (PDT) Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com. [209.85.212.171]) by mx.google.com with ESMTPS id do5si11816543wib.50.2015.06.10.13.10.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Jun 2015 13:10:00 -0700 (PDT) Received-SPF: pass (google.com: domain of daniel.thompson@linaro.org designates 209.85.212.171 as permitted sender) client-ip=209.85.212.171; Received: by wibdq8 with SMTP id dq8so57812186wib.1 for ; Wed, 10 Jun 2015 13:10:00 -0700 (PDT) X-Received: by 10.180.187.203 with SMTP id fu11mr22525355wic.26.1433967000238; Wed, 10 Jun 2015 13:10:00 -0700 (PDT) Received: from scallop.lan (cpc4-aztw19-0-0-cust71.18-1.cable.virginm.net. [82.33.25.72]) by mx.google.com with ESMTPSA id u9sm16105057wju.44.2015.06.10.13.09.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Jun 2015 13:09:59 -0700 (PDT) From: Daniel Thompson To: Mike Turquette , Stephen Boyd Cc: Daniel Thompson , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Maxime Coquelin , Kamil Lulko , Andreas Farber , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: [PATCH v3 3/3] ARM: dts: stm32f429: Adopt STM32F4 clock driver Date: Wed, 10 Jun 2015 21:09:38 +0100 Message-Id: <1433966978-24422-4-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 2.4.2 In-Reply-To: <1433966978-24422-1-git-send-email-daniel.thompson@linaro.org> References: <1432327273-6810-1-git-send-email-daniel.thompson@linaro.org> <1433966978-24422-1-git-send-email-daniel.thompson@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , New bindings and driver have been created for STM32F42xxx series parts. This patch integrates these changes. Note: Earlier device tree blobs (those without st,stm32f42xxx compatibles for the rcc) could still be used to boot basic systems. Such systems rely on the bootloader to configure the clock gates for vital periperhals. Signed-off-by: Daniel Thompson Reviewed-by: Maxime Coquelin --- arch/arm/boot/dts/stm32f429-disco.dts | 4 ++ arch/arm/boot/dts/stm32f429.dtsi | 79 +++++++++++------------------------ 2 files changed, 28 insertions(+), 55 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts index 17cbb83..97028da 100644 --- a/arch/arm/boot/dts/stm32f429-disco.dts +++ b/arch/arm/boot/dts/stm32f429-disco.dts @@ -66,6 +66,10 @@ }; }; +&clk_hse { + clock-frequency = <8000000>; +}; + &usart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index ef6d382..748b886 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -49,48 +49,10 @@ / { clocks { - clk_sysclk: clk-sysclk { + clk_hse: clk-hse { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_hclk: clk-hclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_pclk1: clk-pclk1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <42000000>; - }; - - clk_pclk2: clk-pclk2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <84000000>; - }; - - clk_pmtr1: clk-pmtr1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <84000000>; - }; - - clk_pmtr2: clk-pmtr2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_systick: clk-systick { - compatible = "fixed-factor-clock"; - clocks = <&clk_hclk>; - #clock-cells = <0>; - clock-div = <8>; - clock-mult = <1>; + clock-frequency = <0>; }; }; @@ -99,7 +61,7 @@ compatible = "st,stm32-timer"; reg = <0x40000000 0x400>; interrupts = <28>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 128>; status = "disabled"; }; @@ -107,7 +69,7 @@ compatible = "st,stm32-timer"; reg = <0x40000400 0x400>; interrupts = <29>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 129>; status = "disabled"; }; @@ -115,7 +77,7 @@ compatible = "st,stm32-timer"; reg = <0x40000800 0x400>; interrupts = <30>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 130>; status = "disabled"; }; @@ -123,7 +85,7 @@ compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; interrupts = <50>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 131>; status = "disabled"; }; @@ -131,7 +93,7 @@ compatible = "st,stm32-timer"; reg = <0x40001000 0x400>; interrupts = <54>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 132>; status = "disabled"; }; @@ -139,7 +101,7 @@ compatible = "st,stm32-timer"; reg = <0x40001400 0x400>; interrupts = <55>; - clocks = <&clk_pmtr1>; + clocks = <&rcc 0 133>; status = "disabled"; }; @@ -147,7 +109,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004400 0x400>; interrupts = <38>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 145>; status = "disabled"; }; @@ -155,7 +117,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004800 0x400>; interrupts = <39>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 146>; status = "disabled"; }; @@ -163,7 +125,7 @@ compatible = "st,stm32-uart"; reg = <0x40004c00 0x400>; interrupts = <52>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 147>; status = "disabled"; }; @@ -171,7 +133,7 @@ compatible = "st,stm32-uart"; reg = <0x40005000 0x400>; interrupts = <53>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 148>; status = "disabled"; }; @@ -179,7 +141,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007800 0x400>; interrupts = <82>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 158>; status = "disabled"; }; @@ -187,7 +149,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007c00 0x400>; interrupts = <83>; - clocks = <&clk_pclk1>; + clocks = <&rcc 0 159>; status = "disabled"; }; @@ -195,7 +157,7 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011000 0x400>; interrupts = <37>; - clocks = <&clk_pclk2>; + clocks = <&rcc 0 164>; status = "disabled"; }; @@ -203,13 +165,20 @@ compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011400 0x400>; interrupts = <71>; - clocks = <&clk_pclk2>; + clocks = <&rcc 0 165>; status = "disabled"; }; + + rcc: rcc@40023810 { + #clock-cells = <2>; + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; + reg = <0x40023800 0x400>; + clocks = <&clk_hse>; + }; }; }; &systick { - clocks = <&clk_systick>; + clocks = <&rcc 1 0>; status = "okay"; };