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[209.132.180.67]) by mx.google.com with ESMTP id qp7si284590pac.120.2015.08.04.00.28.32; Tue, 04 Aug 2015 00:28:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755076AbbHDH23 (ORCPT + 28 others); Tue, 4 Aug 2015 03:28:29 -0400 Received: from mail-pd0-f173.google.com ([209.85.192.173]:36753 "EHLO mail-pd0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754999AbbHDH2Y (ORCPT ); Tue, 4 Aug 2015 03:28:24 -0400 Received: by pdco4 with SMTP id o4so830220pdc.3 for ; Tue, 04 Aug 2015 00:28:23 -0700 (PDT) X-Received: by 10.70.118.163 with SMTP id kn3mr4900657pdb.115.1438673303401; Tue, 04 Aug 2015 00:28:23 -0700 (PDT) Received: from localhost.localdomain ([180.150.157.4]) by smtp.gmail.com with ESMTPSA id pe3sm255184pdb.55.2015.08.04.00.28.12 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Aug 2015 00:28:22 -0700 (PDT) From: Leo Yan To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Wei Xu , Haojian Zhuang , Bintian Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Guodong Xu , Jian Zhang , Zhenwei Wang , Haoju Mo , Dan Zhao , sunzhaosheng@hisilicon.com, victor.lixin@hisilicon.com Cc: Leo Yan Subject: [PATCH v4 4/4] arm64: dts: add Hi6220's stub clock node Date: Tue, 4 Aug 2015 15:27:29 +0800 Message-Id: <1438673249-6051-5-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438673249-6051-1-git-send-email-leo.yan@linaro.org> References: <1438673249-6051-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: leo.yan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable SRAM node and stub clock node for Hi6220; furthermore add the CPU's clock so it will be used by cpufreq-dt driver. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index b42a9b7..94b8310 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -57,6 +57,17 @@ device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; + clocks = <&stub_clock 0>; + clock-latency = <0>; + operating-points = < + /* kHz */ + 1200000 0 + 960000 0 + 729000 0 + 432000 0 + 208000 0 + >; + #cooling-cells = <2>; /* min followed by max */ }; cpu1: cpu@1 { @@ -136,6 +147,11 @@ #size-cells = <2>; ranges; + sram: sram@fff80000 { + compatible = "hisilicon,hi6220-sramctrl", "syscon"; + reg = <0x0 0xfff80000 0x0 0x12000>; + }; + ao_ctrl: ao_ctrl@f7800000 { compatible = "hisilicon,hi6220-aoctrl", "syscon"; reg = <0x0 0xf7800000 0x0 0x2000>; @@ -160,6 +176,13 @@ #clock-cells = <1>; }; + stub_clock: stub_clock { + compatible = "hisilicon,hi6220-stub-clk"; + hisilicon,hi6220-clk-sram = <&sram>; + #clock-cells = <1>; + mboxes = <&mailbox 1>; + }; + uart0: uart@f8015000 { /* console */ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>;