From patchwork Fri Jun 19 02:36:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 191155 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp121173ilo; Thu, 18 Jun 2020 19:36:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxku5mJYGJOkdA694sAHkSDufqhl54Zf/am0PIoYv4KxCcLP4LOUY4Li7hP+WbXHbaV5SfS X-Received: by 2002:aa7:c80c:: with SMTP id a12mr1179927edt.140.1592534214941; Thu, 18 Jun 2020 19:36:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592534214; cv=none; d=google.com; s=arc-20160816; b=LOZYrboD5oDo9lBFXReRotptp6Afk1oh1p5WjqzNnIz3Jbt+ddO9oEF4wlG6Fo/592 erhTz7nggTnAuTzwuecvDsgoM4tf23ZFxJNYg9YJfcG83pEy8dOGhfqGapvCOKKlDpzc hJHYRdJGNPNtO7BuEMYd9HzE4rbf4vrqqhCT+c1sgQU4vFWCq6hvm34o4X7JwysWsdvD tdAPOyCRp4nYm1AaSK8A6DXfXVZ70piY6jw2QfEByKs8pViM6Ulyu8OY7H71yptcWwEU qeMy+eL1wuao/sHcC2tTCKeGW7QYb1ecEBf6OzXpgImxtVfAv6eeODwrv8Yc5HDzTqDM if5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=0BsL//qB2KOOS1z32JMFyyiZqZPqQKA7C8ZAcj6eYhY=; b=nbpuxid10XwFv3vo1+oFm2pRgESeclAC2dOe4Z67UYoPvJW/XrjEQ+vtsnss5NXfm4 ASg2mzWH60LxsGonn7M75JxHqf9nSvLHLLnXFEaJ/pxwCq5AQRz4r29HcXtqmr8QjYpw xgCrA3FHfWTI+LZSf/dpv2M91PEtlA/7Cg9xd07noa3L57uHCvaVr0MO+maZuI4KFcLC hmnqe2Z/cahGuEm+c020Xippb7HMWnJDPX2Nmtp0YfxoVxMAtS85bXa+ICn0YBMaLHOJ NwHGvlQHWD1YWu6himQfAu6EAW9R1kPycqHLv4fLNXC2WZwlyL1pDAKeUXup3i2o7a8i iZFg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w14si3343779ede.41.2020.06.18.19.36.54; Thu, 18 Jun 2020 19:36:54 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730094AbgFSCgx (ORCPT + 6 others); Thu, 18 Jun 2020 22:36:53 -0400 Received: from mx.socionext.com ([202.248.49.38]:27926 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730017AbgFSCgw (ORCPT ); Thu, 18 Jun 2020 22:36:52 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 19 Jun 2020 11:36:51 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 808DB60057; Fri, 19 Jun 2020 11:36:51 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 19 Jun 2020 11:36:51 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 1A88B1A0E67; Fri, 19 Jun 2020 11:36:51 +0900 (JST) From: Kunihiko Hayashi To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Masahiro Yamada Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kunihiko Hayashi Subject: [PATCH 1/2] dt-bindings: phy: Add UniPhier AHCI PHY description Date: Fri, 19 Jun 2020 11:36:46 +0900 Message-Id: <1592534207-13550-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592534207-13550-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1592534207-13550-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT bindings for PHY interface built into ahci controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi --- .../bindings/phy/socionext,uniphier-ahci-phy.yaml | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml -- 2.7.4 diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml new file mode 100644 index 0000000..9391e2e --- /dev/null +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier AHCI PHY + +description: | + This describes the deivcetree bindings for PHY interfaces built into + AHCI controller implemented on Socionext UniPhier SoCs. + +maintainers: + - Kunihiko Hayashi + +properties: + compatible: + enum: + - socionext,uniphier-pxs2-ahci-phy + - socionext,uniphier-pxs3-ahci-phy + + reg: + description: PHY register region (offset and length) + + "#phy-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + oneOf: + - items: # for PXs2 + - const: link + - items: # for others + - const: link + - const: phy + + resets: + maxItems: 2 + + reset-names: + - items: + - const: link + - const: phy + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + ahci-glue@65700000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65700000 0x100>; + + ahci_phy: phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; + }; + };