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[209.132.180.67]) by mx.google.com with ESMTP id z1-v6si4876508plb.558.2018.05.17.05.51.15; Thu, 17 May 2018 05:51:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=C8L4Pmio; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751971AbeEQMvO (ORCPT + 5 others); Thu, 17 May 2018 08:51:14 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:39918 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751976AbeEQMvM (ORCPT ); Thu, 17 May 2018 08:51:12 -0400 Received: by mail-wm0-f65.google.com with SMTP id f8-v6so8906785wmc.4 for ; Thu, 17 May 2018 05:51:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1m6wt/I5Xqy7lleY5kPyQEHM8qrCIpW/qcpICtTnOfs=; b=C8L4PmiogCApKvmcrwjGYve/cPc1Qb4UIG9F8eN8C3bz710SdR6PNa6e/38zRZf28J zAOkXWm2k/h4+z0ok1Isl7HixD+RT6F7kMNTOJggoouQKeSl170G7m22fILpFoWHrYZT q4yomj8Jh3acp7friByw8T7Pbh6lLzEgTU5Lw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1m6wt/I5Xqy7lleY5kPyQEHM8qrCIpW/qcpICtTnOfs=; b=ApeC1zfQqC72uvCKa8sblDkr/zxwohsMaebKibsEOwZ2Fb+Tyk0pUXvoVgZPh7Kiu0 rtY8x6RRwYH0fE2uFz/E80QPb0whholH+KCF3BUUNhp5po5rxJHT8wdBUHckbwi+KL1B 39ozVz3t9FqCNu9WBL3WtVU73BeocX/jcglx+r4v8YR5wMALu5MoJi3oO8VEA42BoNOO yudwmmeXqKl4wBf0ttJcIK0h2OQPjRdW8Fl9y16WB9bc/vzf+wVotfCa+y1Yd0p9tkFz 1U+2JYyC8YEmarfVdxhtBpbC35CAqb7kRrpJBQ/f0lES5O3zqr+rTrNoChp1jHzxx4P3 nvrQ== X-Gm-Message-State: ALKqPwd093VzjkhFmp5ZrWfkHkq4Ps3STFHIlZ/Bv9F7z8KKxfzKHt87 F7yN2l4k2UMG6USFRegLSR4BsA== X-Received: by 2002:a1c:37c2:: with SMTP id e185-v6mr1690874wma.20.1526561471532; Thu, 17 May 2018 05:51:11 -0700 (PDT) Received: from localhost.localdomain ([2001:8a0:6606:9100:b159:5390:182d:7dce]) by smtp.gmail.com with ESMTPSA id 33-v6sm6077665wrs.5.2018.05.17.05.51.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 May 2018 05:51:10 -0700 (PDT) From: Rui Miguel Silva To: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring Cc: linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Shawn Guo , Fabio Estevam , devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , Rui Miguel Silva Subject: [PATCH v4 08/12] ARM: dts: imx7s: add multiplexer controls Date: Thu, 17 May 2018 13:50:29 +0100 Message-Id: <20180517125033.18050-9-rui.silva@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180517125033.18050-1-rui.silva@linaro.org> References: <20180517125033.18050-1-rui.silva@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva Reviewed-by: Philipp Zabel --- arch/arm/boot/dts/imx7s.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 67450ad89940..3590dab529f9 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -520,8 +520,14 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 {