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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:34 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon Date: Tue, 12 May 2020 17:54:41 -0700 Message-Id: <20200513005441.1102586-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that we don't need the intermediate syscon to represent the TCSR mutexes, update the dts to describe the TCSR mutex directly. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index ecbcf725fba2..6e28754705b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -146,12 +146,6 @@ scm: scm { }; }; - tcsr_mutex: hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_regs 0 0x1000>; - #hwlock-cells = <1>; - }; - memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ @@ -569,9 +563,10 @@ rpmhpd_opp_turbo_l1: opp10 { }; }; - tcsr_mutex_regs: syscon@1f40000 { - compatible = "syscon"; + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; + #hwlock-cells = <1>; }; slpi: remoteproc@5c00000 {