diff mbox series

[03/38] dt-bindings: memory: Increase number of reg entries on Tegra194

Message ID 20200612141903.2391044-4-thierry.reding@gmail.com
State New
Headers show
Series [01/38] dt-bindings: interrupt-controller: arm,gic: Add compatible for Tegra186 AGIC | expand

Commit Message

Thierry Reding June 12, 2020, 2:18 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

The memory controller and external memory controller control multiple
channels that require additional register ranges. Allow the number of
ranges to be up to 3 or 2 for the memory controller and the external
memory controller, respectively.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../nvidia,tegra186-mc.yaml                   | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index 581572fe3077..774b04d0da0d 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -102,6 +102,31 @@  required:
 
 additionalProperties: false
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nvidia,tegra194-mc
+    then:
+      properties:
+        reg:
+          maxItems: 3
+
+  - if:
+      patternProperties:
+        "^external-memory-controller@[0-9a-f]+$":
+          properties:
+            compatible:
+              contains:
+                const: nvidia,tegra194-emc
+    then:
+      patternProperties:
+        "^external-memory-controller@[0-9a-f]+$":
+          properties:
+            reg:
+              maxItems: 2
+
 examples:
   - |
     #include <dt-bindings/clock/tegra186-clock.h>