diff mbox series

[05/38] dt-bindings: firmware: tegra186-bpmp: Document interconnect paths

Message ID 20200612141903.2391044-6-thierry.reding@gmail.com
State New
Headers show
Series [01/38] dt-bindings: interrupt-controller: arm,gic: Add compatible for Tegra186 AGIC | expand

Commit Message

Thierry Reding June 12, 2020, 2:18 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Document the interconnects property that is used to describe the paths
from and to system memory from and to the BPMP.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../firmware/nvidia,tegra186-bpmp.yaml        | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml
index 0e4d51ba7aa1..fd642eeb8dde 100644
--- a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml
+++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml
@@ -43,6 +43,21 @@  properties:
       - enum:
           - nvidia,tegra186-bpmp
 
+  interconnects:
+    description: A list of phandle and specifier pairs that describe the
+      interconnect paths to and from the BPMP.
+    $ref: "/schemas/types.yaml#/definitions/phandle-array"
+
+  interconnect-names:
+    description: One string for each pair of phandle and specifier in the
+      "interconnects" property.
+    $ref: "/schemas/types.yaml#/definitions/string-array"
+    items:
+      - const: read
+      - const: write
+      - const: dma-mem # dma-read
+      - const: dma-write
+
   iommus:
     description: |
       The phandle of the IOMMU and the IOMMU specifier. See ../iommu/iommu.txt
@@ -158,6 +173,12 @@  examples:
 
     bpmp {
         compatible = "nvidia,tegra186-bpmp";
+        interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
+                        <&mc TEGRA186_MEMORY_CLIENT_BPMPW &emc>,
+                        <&mc TEGRA186_MEMORY_CLIENT_BPMPDMAR &emc>,
+                        <&mc TEGRA186_MEMORY_CLIENT_BPMPDMAW &emc>;
+        interconnect-names = "read", "write", "dma-mem", "dma-write";
+
         iommus = <&smmu TEGRA186_SID_BPMP>;
         mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>;
         shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;