From patchwork Tue Jun 30 09:27:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 192060 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp3645572ilg; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9+qDjMDrVVgtk96/u5Nhkc11tZUpPa4df6ynPA4g9Aur5iD9NnKpyRhblLrmpM7GhHTyE X-Received: by 2002:a17:907:1050:: with SMTP id oy16mr18265734ejb.353.1593509270008; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593509270; cv=none; d=google.com; s=arc-20160816; b=B45SxajHt1ikeo7ilcHZWgMILat6siuchQndvW/0aoiKuUcy63SC6BZBVs42gTMN0q T6hmmZsM8CVHxKR+nhNkZtVnUNd9Vvkk7DAfOfjhhXUlKtWEeA1X/rP+N2qs46STkRmm sP0XPgFj+DmWxJupJbxJIpY21cOVMwZOmnRWDA56+QZ2xboTJqE6zQ16kmOImEXO0w/q 8DiIxliBWy5pRpNghrr8ILXgKKHokiN7WIiMOnpv9d2U7eSs15bZmZ6JI896Y7AQwQ4E u2qiXcKhje+zG+7oHk074RBaoQmVz6KIRRw7a4iMqb6xne7aHR9udkVkbhSx2u0D+Tfa OYKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; b=pPvIr/i2S9kDl7dZsUwJnHVUdB1pr4iT+vYi9iCsRaOqWtLOVa7TSRmPD9jSijpmXc 7p9MeNGFp7tHD+DOf39xxZEgrfqQVT0rXGuzE063YBl5EICHOtMRbZrica058a9cSdZW uxVQT+FWCnyJ4+yA0Cz4tnJyMv6BZ4ywp/RR2Ia+GjGLPNfgviHVk4afJUwr+8gJowXG 9ih5+J0TkH8UN7//Oxc67fjXDIh5a+8BRxqcn2AYMcw978TMf7XyKQL2dhSxHg7aG9QB RI11EZ1wTjJ0B17P4z+qyhXwMA8uX2dVWtoqGpTfwo5IiJsudKR/Pz+NB9cSmIAoFAPE Ryhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J4PMh6rF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o16si1418394edv.45.2020.06.30.02.27.49; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J4PMh6rF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731937AbgF3J1s (ORCPT + 6 others); Tue, 30 Jun 2020 05:27:48 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46420 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730256AbgF3J1l (ORCPT ); Tue, 30 Jun 2020 05:27:41 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RdIN080172; Tue, 30 Jun 2020 04:27:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593509259; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=J4PMh6rFDjB92KyKCwMoRcTM8jcci1MAVpb3Q61G3lGW62GHNmN+DcZmZ7NIGVckf DU6vEWL+gtp+aB7ghrp52ZgIPEI82uINK2mO2ccsyV4qWyBPvJ+1Zp/9CKDB1W9ITX KGuQZsNwJxVDe1Dkkx9ZjWq/iLKnTz+0LCeV9qoc= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05U9RdCq030347 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jun 2020 04:27:39 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 30 Jun 2020 04:27:39 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 30 Jun 2020 04:27:39 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RUU7003947; Tue, 30 Jun 2020 04:27:37 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros , Bin Liu Subject: [PATCH v3 3/3] phy: omap-usb2-phy: disable PHY charger detect Date: Tue, 30 Jun 2020 12:27:29 +0300 Message-ID: <20200630092729.15346-4-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630092729.15346-1-rogerq@ti.com> References: <20200630092729.15346-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. Using property "ti,disable-charger-det" in the DT usb2-phy node to enable this workaround for AM654x PG1.0. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Bin Liu Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- drivers/phy/ti/phy-omap-usb2.c | 35 +++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/phy/ti/phy-omap-usb2.c b/drivers/phy/ti/phy-omap-usb2.c index cb2dd3230fa7..21c3904d4efc 100644 --- a/drivers/phy/ti/phy-omap-usb2.c +++ b/drivers/phy/ti/phy-omap-usb2.c @@ -26,6 +26,10 @@ #define USB2PHY_ANA_CONFIG1 0x4c #define USB2PHY_DISCON_BYP_LATCH BIT(31) +#define USB2PHY_CHRG_DET 0x14 +#define USB2PHY_CHRG_DET_USE_CHG_DET_REG BIT(29) +#define USB2PHY_CHRG_DET_DIS_CHG_DET BIT(28) + /* SoC Specific USB2_OTG register definitions */ #define AM654_USB2_OTG_PD BIT(8) #define AM654_USB2_VBUS_DET_EN BIT(5) @@ -43,6 +47,7 @@ #define OMAP_USB2_HAS_START_SRP BIT(0) #define OMAP_USB2_HAS_SET_VBUS BIT(1) #define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(2) +#define OMAP_USB2_DISABLE_CHRG_DET BIT(3) struct omap_usb { struct usb_phy phy; @@ -236,6 +241,13 @@ static int omap_usb_init(struct phy *x) omap_usb_writel(phy->phy_base, USB2PHY_ANA_CONFIG1, val); } + if (phy->flags & OMAP_USB2_DISABLE_CHRG_DET) { + val = omap_usb_readl(phy->phy_base, USB2PHY_CHRG_DET); + val |= USB2PHY_CHRG_DET_USE_CHG_DET_REG | + USB2PHY_CHRG_DET_DIS_CHG_DET; + omap_usb_writel(phy->phy_base, USB2PHY_CHRG_DET, val); + } + return 0; } @@ -366,14 +378,12 @@ static int omap_usb2_probe(struct platform_device *pdev) phy->mask = phy_data->mask; phy->power_on = phy_data->power_on; phy->power_off = phy_data->power_off; + phy->flags = phy_data->flags; - if (phy_data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - phy->phy_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(phy->phy_base)) - return PTR_ERR(phy->phy_base); - phy->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT; - } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + phy->phy_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(phy->phy_base)) + return PTR_ERR(phy->phy_base); phy->syscon_phy_power = syscon_regmap_lookup_by_phandle(node, "syscon-phy-power"); @@ -405,6 +415,17 @@ static int omap_usb2_probe(struct platform_device *pdev) } } + /* + * Errata i2075: USB2PHY: USB2PHY Charger Detect is Enabled by + * Default Without VBUS Presence. + * + * AM654x SR1.0 has a silicon bug due to which D+ is pulled high after + * POR, which could cause enumeration failure with some USB hubs. + * Disabling the USB2_PHY Charger Detect function will put D+ + * into the normal state. + */ + if (of_property_read_bool(node, "ti,disable-charger-det")) + phy->flags |= OMAP_USB2_DISABLE_CHRG_DET; phy->wkupclk = devm_clk_get(phy->dev, "wkupclk"); if (IS_ERR(phy->wkupclk)) {