From patchwork Tue Sep 15 08:43:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 303983 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp2338235ilg; Tue, 15 Sep 2020 01:43:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwxMnPEz50MkNsiE7fD9gMrldu17YWd2n4D8j4Wab6p6oyMTfS5uAXN1P4cu4OInDV7zP7v X-Received: by 2002:a50:d304:: with SMTP id g4mr21093569edh.248.1600159434154; Tue, 15 Sep 2020 01:43:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600159434; cv=none; d=google.com; s=arc-20160816; b=zevp269QDQVXCEDUbaCWsDaFqXd/+Zg4LhnYqTQiXmpWoGoSLYxMrDdA4WuU35NYTB y5OTtIzZ4YhACqY7fAWzQapCLGxsm5Ld0fIb6c7M0By7KpKhlQVi7w3QZ/1NzItjfDj9 +Fs+DhRPqN9t31ibBPbM/az1lIEQB0ZGuz886xcxD41bOUjgD5K30Sn19yLZLVoZcACv PwaPGGSjhJ/YkbMWEG1VfPiW47hLETGkh5EWcl+r9maUz6+MoxznOpPRxOFYqJUYVMQj 4bR7f3hsmRnjGuhvXX6Lm1N8AU4oGSU5uxMRDs9gTxOlQRH4+V8qcmGpCmM1ThLgRjWX tcOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jKCPgBoZifUDjMMCwZGOSJO4/f7Mmp752AqKn/FNlvc=; b=HRnNMdX6aPXjhxng9Yy4KMc0uL9bpDKyVvoYaRLMPX+qw5D25DWhFBiyGFHhCr8hZD UO9HdYxafJqGIsZGDgYwyehRXZ9cVwldOh0345FXLby/UYTAR4/YBKJLck852Db0BIiT SnkCIzf3Drlo/H1VIWJG260hpSxV7ontLNSumCrP8e+s5rc6oQOk+rmjex58UwWgvWsZ zBbgIKr8NH+MDpfv9lhOR4fJ5mcAtlUUQEG8nk34wQkLh33Cvz28A6Z3XmDpliulbgdD Gcs9IAjpQOe/e1CYyQEAO0F26e4dXg/atN6AWv/xEQFxTDt48DD6YHHpyHakiNWVEnSa k+mg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k16si8892428ejb.210.2020.09.15.01.43.54; Tue, 15 Sep 2020 01:43:54 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726426AbgIOInw (ORCPT + 6 others); Tue, 15 Sep 2020 04:43:52 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56580 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726401AbgIOInt (ORCPT ); Tue, 15 Sep 2020 04:43:49 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 6725E6BE1B6002694F14; Tue, 15 Sep 2020 16:43:40 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.487.0; Tue, 15 Sep 2020 16:43:31 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Guo Ren , devicetree , linux-csky , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang , "Jianguo Chen" Subject: [PATCH v4 2/4] irqchip: dw-apb-ictl: prepare for support hierarchy irq domain Date: Tue, 15 Sep 2020 16:43:03 +0800 Message-ID: <20200915084305.3085-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200915084305.3085-1-thunder.leizhen@huawei.com> References: <20200915084305.3085-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Rename some functions and variables in advance, to make the next patch looks more clear. The details are as follows: 1. rename dw_apb_ictl_handler() to dw_apb_ictl_handle_irq_cascaded(). 2. change (1 << hwirq) to BIT(hwirq). In function dw_apb_ictl_init(): 1. rename local variable irq to parent_irq. 2. add "const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops", then replace &irq_generic_chip_ops in other places with domain_ops. No functional change. Signed-off-by: Zhen Lei Tested-by: Haoyu Lv --- drivers/irqchip/irq-dw-apb-ictl.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) -- 1.8.3 diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index e4550e9c810ba94..5458004242e9d20 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -26,7 +26,7 @@ #define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_BASE_OFFSET 0x04 -static void dw_apb_ictl_handler(struct irq_desc *desc) +static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc) { struct irq_domain *d = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); @@ -43,7 +43,7 @@ static void dw_apb_ictl_handler(struct irq_desc *desc) u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); generic_handle_irq(virq); - stat &= ~(1 << hwirq); + stat &= ~BIT(hwirq); } } @@ -73,12 +73,13 @@ static int __init dw_apb_ictl_init(struct device_node *np, struct irq_domain *domain; struct irq_chip_generic *gc; void __iomem *iobase; - int ret, nrirqs, irq, i; + int ret, nrirqs, parent_irq, i; u32 reg; + const struct irq_domain_ops *domain_ops = &irq_generic_chip_ops; /* Map the parent interrupt for the chained handler */ - irq = irq_of_parse_and_map(np, 0); - if (irq <= 0) { + parent_irq = irq_of_parse_and_map(np, 0); + if (parent_irq <= 0) { pr_err("%pOF: unable to parse irq\n", np); return -EINVAL; } @@ -120,8 +121,7 @@ static int __init dw_apb_ictl_init(struct device_node *np, else nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L)); - domain = irq_domain_add_linear(np, nrirqs, - &irq_generic_chip_ops, NULL); + domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL); if (!domain) { pr_err("%pOF: unable to add irq domain\n", np); ret = -ENOMEM; @@ -146,7 +146,8 @@ static int __init dw_apb_ictl_init(struct device_node *np, gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; } - irq_set_chained_handler_and_data(irq, dw_apb_ictl_handler, domain); + irq_set_chained_handler_and_data(parent_irq, + dw_apb_ictl_handle_irq_cascaded, domain); return 0;